Hey, Seems to be just some register definitions.
Acked-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com> Best regards, ~Maarten On 2025-05-22 07:25, Hogander, Jouni wrote: > Hello DRM Maintainers, > > I have two patches (01/12 and 02/12) in this set I would like to merge > via drm-intel/drm-intel-next. Is that ok to you? They are touching i915 > display driver and drm_dp.h header and rest of the patch set is > depending on those changes. Can one of you ack those two patches? > > Thank You in Advance, > > Jouni Högander > > On Wed, 2025-05-21 at 14:53 +0300, Jouni Högander wrote: >> This patch set is adding missing configuration to have Panel Replay >> and Adaptive Sync enabled simultaneously. Also some issues identified >> while debugging are fixed: >> >> 1. Source PORT ALPM configuration has to made during modeset. >> 2. PHY_CMN1_CONTROL is not written according to HAS document >> 3. Wrong register field definitions for PORT_ALPM_LFPS_CTL. >> >> Patches are tested on LunarLake and PantherLake using our reference >> panel supporting >> Adaptive Sync and Panel Replay. >> >> v4: >> - added DP_DSC_DECODE_CAPABILITY definitions >> - use defined shift instead of hardcoded value >> v3: >> - comment about DP2.1 corrected as DP2.1a >> - referring patch removed from commit message >> v2: >> - rework Panel Replay DPCD register definitions >> - do not use hardcoded indices while accessing intel_dp->pr_dpcd >> - ensure ALPM registers are not written on platform where they do >> not exist >> - remove kerneldoc comments >> >> Jouni Högander (12): >> drm/panelreplay: Panel Replay capability DPCD register definitions >> drm/dp: Add Panel Replay capability bits from DP2.1 specification >> drm/i915/psr: Read all Panel Replay capability registers from DPCD >> drm/i915/alpm: Add PR_ALPM_CTL register definitions >> drm/i915/alpm: Write PR_ALPM_CTL register >> drm/i915/psr: Add interface to check if AUXLess ALPM is needed by >> PSR >> drm/i915/alpm: Add new interface to check if AUXLess ALPM is used >> drm/i915/alpm: Move port alpm configuration >> drm/i915/display: Add PHY_CMN1_CONTROL register definitions >> drm/i915/display: Add function to configure LFPS sending >> drm/i915/psr: Fix using wrong mask in REG_FIELD_PREP >> drm/i915/psr: Do not disable Panel Replay in case VRR is enabled >> >> drivers/gpu/drm/i915/display/intel_alpm.c | 72 +++++++++++++---- >> -- >> drivers/gpu/drm/i915/display/intel_alpm.h | 4 ++ >> drivers/gpu/drm/i915/display/intel_cx0_phy.c | 32 +++++++++ >> drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 + >> .../gpu/drm/i915/display/intel_cx0_phy_regs.h | 3 + >> drivers/gpu/drm/i915/display/intel_ddi.c | 12 ++++ >> .../drm/i915/display/intel_display_types.h | 4 +- >> drivers/gpu/drm/i915/display/intel_psr.c | 44 +++++++----- >> drivers/gpu/drm/i915/display/intel_psr.h | 2 + >> drivers/gpu/drm/i915/display/intel_psr_regs.h | 14 +++- >> include/drm/display/drm_dp.h | 24 +++++-- >> 11 files changed, 168 insertions(+), 45 deletions(-) >> >