Add GDSP0 and GDSP1 fastrpc compute-cb nodes for sa8775p SoC. Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@oss.qualcomm.com> Signed-off-by: Ling Xu <quic_l...@quicinc.com> --- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 57 +++++++++++++++++++++++++++ 1 file changed, 57 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
index 45f536633f64..f69fb1d05a0d 100644
--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
+++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
@@ -5605,6 +5605,34 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
label = "gpdsp0";
qcom,remote-pid = <17>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels =
"fastrpcglink-apps-dsp";
+ label = "gdsp0";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible =
"qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x38a1
0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@2 {
+ compatible =
"qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x38a2
0x0>;
+ dma-coherent;
+ };
+ compute-cb@3 {
+ compatible =
"qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x38a3
0x0>;
+ dma-coherent;
+ };
+ };
};
};
@@ -5648,6 +5676,35 @@ IPCC_MPROC_SIGNAL_GLINK_QMP
label = "gpdsp1";
qcom,remote-pid = <18>;
+
+ fastrpc {
+ compatible = "qcom,fastrpc";
+ qcom,glink-channels =
"fastrpcglink-apps-dsp";
+ label = "gdsp1";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compute-cb@1 {
+ compatible =
"qcom,fastrpc-compute-cb";
+ reg = <1>;
+ iommus = <&apps_smmu 0x38c1
0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@2 {
+ compatible =
"qcom,fastrpc-compute-cb";
+ reg = <2>;
+ iommus = <&apps_smmu 0x38c2
0x0>;
+ dma-coherent;
+ };
+
+ compute-cb@3 {
+ compatible =
"qcom,fastrpc-compute-cb";
+ reg = <3>;
+ iommus = <&apps_smmu 0x38c3
0x0>;
+ dma-coherent;
+ };
+ };
};
};
--
2.34.1
