On Fri, Jul 04, 2025 at 05:23:24PM +0300, Cristian Ciocaltea wrote:
> In order to support correct initialization of the timer base in the HDMI
> QP IP block, extend the platform data to provide the necessary reference
> clock rate.
>
> While at it, ensure plat_data is zero-initialized in
> dw_hdmi_qp_rockchip_bind().
>
> Signed-off-by: Cristian Ciocaltea <cristian.ciocal...@collabora.com>
> ---
> drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c | 13 ++++++++++++-
> include/drm/bridge/dw_hdmi_qp.h | 1 +
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> index
> 126e556025961e8645f3567b4d7a1c73cc2f2e7f..8c1185490009c5f1bc658998a868f8b18dc479a3
> 100644
> --- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> @@ -431,8 +431,8 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev,
> struct device *master,
> void *data)
> {
> struct platform_device *pdev = to_platform_device(dev);
> + struct dw_hdmi_qp_plat_data plat_data = {};
> const struct rockchip_hdmi_qp_cfg *cfg;
> - struct dw_hdmi_qp_plat_data plat_data;
> struct drm_device *drm = data;
> struct drm_connector *connector;
> struct drm_encoder *encoder;
> @@ -515,6 +515,17 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev,
> struct device *master,
> return ret;
> }
>
> + for (i = 0; i < ret; i++) {
> + if (!strcmp(clks[i].id, "ref")) {
> + plat_data.ref_clk_rate = clk_get_rate(clks[i].clk);
> + break;
> + }
> + }
> + if (!plat_data.ref_clk_rate) {
> + dev_err(hdmi->dev, "Missing ref clock\n");
> + return -EINVAL;
> + }
> +You'd be better off not using clk_bulk, or calling an additional clk_get for the ref clock only. Maxime
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