On Wed, Aug 06, 2025 at 11:27:44AM -0400, Frank Li wrote: > On Wed, Aug 06, 2025 at 06:05:11PM +0300, Laurentiu Palcu wrote: > > DCIF is the i.MX94 Display Controller Interface which is used to > > drive a TFT LCD panel or connects to a display interface depending > > on the chip configuration. > > nit: wrap at 75 chars > > > > > Signed-off-by: Laurentiu Palcu <laurentiu.pa...@oss.nxp.com> > > --- > > .../bindings/display/imx/nxp,imx94-dcif.yaml | 82 +++++++++++++++++++ > > 1 file changed, 82 insertions(+) > > create mode 100644 > > Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml > > b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml > > new file mode 100644 > > index 0000000000000..54419c589ef74 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx94-dcif.yaml > > @@ -0,0 +1,82 @@ > > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > > +# Copyright 2025 NXP > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/display/imx/nxp,imx94-dcif.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: i.MX94 Display Control Interface (DCIF) > > + > > +maintainers: > > + - Laurentiu Palcu <laurentiu.pa...@oss.nxp.com> > > + > > +description: > > + The Display Control Interface(DCIF) is a system master that fetches > > graphics > > + stored in memory and displays them on a TFT LCD panel or connects to a > > + display interface depending on the chip configuration. > > + > > +properties: > > + compatible: > > + const: nxp,imx94-dcif > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: CPU domain 0 (controlled by common registers group). > > + - description: CPU domain 1 (controlled by background layer > > registers group). > > + - description: CPU domain 2 (controlled by foreground layer > > registers group). > > + > > + interrupt-names: > > + items: > > + - const: common > > + - const: bg_layer > > + - const: fg_layer > > + > > + clocks: > > + maxItems: 3 > > + > > + clock-names: > > + items: > > + - const: apb > > + - const: axi > > + - const: pix > > + > > + power-domains: > > + maxItems: 1 > > + > > + port: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Display Pixel Interface(DPI) output port > > I think need > > properties: > endpoint: > $ref: video-interfaces.yaml# > unevaluatedProperties: false > > Most likely need set > > bus-width, hsync-active, vsync-active
We don't set these in DTS for DCIF. Hence, we don't need a specialiazed binding for the endpoint. Laurentiu > > Frank > > + > > +additionalProperties: false > > + > > +examples: > > + - | > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + > > + soc { > > + #address-cells = <2>; > > + #size-cells = <2>; > > + > > + display-controller@4b120000 { > > + compatible = "nxp,imx94-dcif"; > > + reg = <0x0 0x4b120000 0x0 0x300000>; > > + interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>, > > + <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "common", "bg_layer", "fg_layer"; > > + clocks = <&scmi_clk 69>, <&scmi_clk 70>, <&dispmix_csr 0>; > > + clock-names = "apb", "axi", "pix"; > > + assigned-clocks = <&dispmix_csr 0>; > > + assigned-clock-parents = <&ldb_pll_pixel>; > > + power-domains = <&scmi_devpd 11>; > > + > > + port { > > + dcif_out: endpoint { > > + remote-endpoint = <&ldb_in>; > > + }; > > + }; > > + }; > > + }; > > -- > > 2.49.0 > >