On Wed, Aug 13, 2025 at 05:42:38PM +0800, Yongbang Shi wrote:
> From: Baihan Li <libai...@huawei.com>
>
> The DP reset was adding in the former commit, so move HDCP cfg after DP
> controller deresets, so that configuration takes effect.
>
> Fixes: 3c7623fb5bb6 ("drm/hisilicon/hibmc: Enable this hot plug detect of irq
> feature")
> Signed-off-by: Baihan Li <libai...@huawei.com>
> Signed-off-by: Yongbang Shi <shiyongb...@huawei.com>
This should be squashed into reset commit.
> ---
> ChangeLog:
> v3 -> v4:
> - fix the commit subject, suggested by Dmitry Baryshkov.
> v2 -> v3:
> - split into 2 commits, suggested by Dmitry Baryshkov.
> ---
> drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
> b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
> index 18beef71d85f..73a0c0156092 100644
> --- a/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
> +++ b/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c
> @@ -176,8 +176,6 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp)
> dp_dev->link.cap.lanes = 0x2;
> dp_dev->link.cap.link_rate = DP_LINK_BW_8_1;
>
> - /* hdcp data */
> - writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG);
> /* int init */
> writel(0, dp_dev->base + HIBMC_DP_INTR_ENABLE);
> writel(HIBMC_DP_INT_RST, dp_dev->base + HIBMC_DP_INTR_ORIGINAL_STATUS);
> @@ -187,6 +185,8 @@ int hibmc_dp_hw_init(struct hibmc_dp *dp)
> writel(0, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL);
> usleep_range(30, 50);
> writel(HIBMC_DP_DPTX_RST, dp_dev->base + HIBMC_DP_DPTX_RST_CTRL);
> + /* hdcp data */
> + writel(HIBMC_DP_HDCP, dp_dev->base + HIBMC_DP_HDCP_CFG);
> /* clock enable */
> writel(HIBMC_DP_CLK_EN, dp_dev->base + HIBMC_DP_DPTX_CLK_CTRL);
>
> --
> 2.33.0
>
--
With best wishes
Dmitry
