On Wed, Aug 13, 2025 at 05:42:33PM +0800, Yongbang Shi wrote:
> From: Baihan Li <libai...@huawei.com>
>
> If DP is connected, check the DP BW in mode_valid_ctx() to ensure
> that DP's link rate supports high-resolution data transmission.
>
> Fixes: f9698f802e50 ("drm/hisilicon/hibmc: Restructuring the header dp_reg.h")
> Signed-off-by: Baihan Li <libai...@huawei.com>
> Signed-off-by: Yongbang Shi <shiyongb...@huawei.com>
> ---
> ChangeLog:
> v3 -> v4:
> - Remove the clock check, suggested by Dmitry Baryshkov.
> - ( I'll add them in next series after redesigning this part)
> ---
> .../gpu/drm/hisilicon/hibmc/dp/dp_config.h | 2 ++
> drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.c | 10 ++++++++++
> drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h | 2 ++
> .../gpu/drm/hisilicon/hibmc/hibmc_drm_dp.c | 19 +++++++++++++++++++
> 4 files changed, 33 insertions(+)
>
This more or less matches what (some of) the other drivers do.
Reviewed-by: Dmitry Baryshkov <dmitry.barysh...@oss.qualcomm.com>
--
With best wishes
Dmitry
