Hi All, On Tue, Aug 19, 2025 at 3:54 PM Laurent Pinchart <laurent.pinch...@ideasonboard.com> wrote: > > On Tue, Aug 19, 2025 at 03:48:08PM +0200, Geert Uytterhoeven wrote: > > On Mon, 28 Jul 2025 at 22:14, Prabhakar wrote: > > > From: Lad Prabhakar <prabhakar.mahadev-lad...@bp.renesas.com> > > > > > > This patch series adds DU/DSI clocks and provides support for the > > > MIPI DSI interface on the RZ/V2H(P) SoC. It was originally part of > > > series [0], but has now been split into 6 patches due to dependencies > > > on the clock driver, making it easier to review and merge. > > > > Thanks for your series! > > > > > Lad Prabhakar (6): > > > clk: renesas: rzv2h-cpg: Add instance field to struct pll > > > clk: renesas: rzv2h-cpg: Add support for DSI clocks > > > clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDC > > > dt-bindings: display: bridge: renesas,dsi: Document RZ/V2H(P) and > > > RZ/V2N > > > drm: renesas: rz-du: mipi_dsi: Add support for LPCLK clock handling > > > drm: renesas: rz-du: mipi_dsi: Add support for RZ/V2H(P) SoC > > > > On the renesas-clk side, I am (almost) totally happy with this. > > Any feedback from the renesas-drm side? > > Tomi told me he added the patches on this review list. > Shall I send a v8 fixing review comments from Geert or wait for Tomi to review?
> > The last patch depends on a header file introduced by the second patch, > > so I will need to provide an immutable branch containing the first > > two patches (probably/hopefully based on v8). > Cheers, Prabhakar
