On Fri, Aug 22, 2025 at 04:43:11PM +0800, Xiangxu Yin wrote: > > On 8/20/2025 7:16 PM, Dmitry Baryshkov wrote: > > On Wed, Aug 20, 2025 at 05:34:50PM +0800, Xiangxu Yin wrote: > >> Introduce DisplayPort PHY configuration routines for QCS615, including > >> aux channel setup, lane control, voltage swing tuning, clock > >> programming and calibration. These callbacks are registered via > >> qmp_phy_cfg to enable DP mode on USB/DP switchable Type-C PHYs. > >> > >> Signed-off-by: Xiangxu Yin <xiangxu....@oss.qualcomm.com> > >> --- > >> drivers/phy/qualcomm/phy-qcom-qmp-dp-phy.h | 1 + > >> drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 251 > >> +++++++++++++++++++++++++++++ > >> 2 files changed, 252 insertions(+) > >> > >> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-dp-phy.h > >> b/drivers/phy/qualcomm/phy-qcom-qmp-dp-phy.h > >> index > >> 0ebd405bcaf0cac8215550bfc9b226f30cc43a59..59885616405f878885d0837838a0bac1899fb69f > >> 100644 > >> --- a/drivers/phy/qualcomm/phy-qcom-qmp-dp-phy.h > >> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-dp-phy.h > >> @@ -25,6 +25,7 @@ > >> #define QSERDES_DP_PHY_AUX_CFG7 0x03c > >> #define QSERDES_DP_PHY_AUX_CFG8 0x040 > >> #define QSERDES_DP_PHY_AUX_CFG9 0x044 > >> +#define QSERDES_DP_PHY_VCO_DIV 0x068 > > This register changes between PHY versions, so you can not declare it here. > > > > Otherwise LGTM. > > > Ok. > > This PHY appears to be QMP_DP_PHY_V2, but there's no dedicated header for it > yet. > > I’ll create |phy-qcom-qmp-dp-phy-v2.h| next patch and define |VCO_DIV| and > shared offsets with V3 will be redefined accordingly.
Nice! Thanks. > > > > > >> > >> /* QSERDES COM_BIAS_EN_CLKBUFLR_EN bits */ > >> # define QSERDES_V3_COM_BIAS_EN 0x0001 -- With best wishes Dmitry
