During the sequencer process, we need to check if GSP was successfully
reloaded. Add functionality to check for the same.
Signed-off-by: Joel Fernandes <joelagn...@nvidia.com>
---
drivers/gpu/nova-core/falcon/gsp.rs | 17 +++++++++++++++++
drivers/gpu/nova-core/regs.rs | 6 ++++++
2 files changed, 23 insertions(+)
diff --git a/drivers/gpu/nova-core/falcon/gsp.rs
b/drivers/gpu/nova-core/falcon/gsp.rs
index f17599cb49fa..58478ada6d3e 100644
--- a/drivers/gpu/nova-core/falcon/gsp.rs
+++ b/drivers/gpu/nova-core/falcon/gsp.rs
@@ -1,9 +1,13 @@
// SPDX-License-Identifier: GPL-2.0
+use kernel::prelude::*;
+use kernel::time::Delta;
+
use crate::{
driver::Bar0,
falcon::{Falcon, FalconEngine, PFalcon2Base, PFalconBase},
regs::{self, macros::RegisterBase},
+ util::wait_on,
};
/// Type specifying the `Gsp` falcon engine. Cannot be instantiated.
@@ -29,4 +33,17 @@ pub(crate) fn clear_swgen0_intr(&self, bar: &Bar0) {
.set_swgen0(true)
.write(bar, &Gsp::ID);
}
+
+ /// Function to check if GSP reload/resume has completed during the boot
process.
+ #[expect(dead_code)]
+ pub(crate) fn check_reload_completed(&self, bar: &Bar0, timeout: Delta) ->
Result<bool> {
+ wait_on(timeout, || {
+ let val = regs::NV_PGC6_BSI_SECURE_SCRATCH_14::read(bar);
+ if val.boot_stage_3_handoff() {
+ Some(true)
+ } else {
+ None
+ }
+ })
+ }
}
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index d9212fa50197..c214f8056d6e 100644
--- a/drivers/gpu/nova-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -123,6 +123,12 @@ pub(crate) fn higher_bound(self) -> u64 {
// These scratch registers remain powered on even in a low-power state and
have a designated group
// number.
+// Boot Sequence Interface (BSI) register used to determine
+// if GSP reload/resume has completed during the boot process.
+register!(NV_PGC6_BSI_SECURE_SCRATCH_14 @ 0x001180f8 {
+ 26:26 boot_stage_3_handoff as bool;
+});
+
// Privilege level mask register. It dictates whether the host CPU has
privilege to access the
// `PGC6_AON_SECURE_SCRATCH_GROUP_05` register (which it needs to read
GFW_BOOT).
register!(NV_PGC6_AON_SECURE_SCRATCH_GROUP_05_PRIV_LEVEL_MASK @ 0x00118128,
--
2.34.1
