From: Thierry Reding <tred...@nvidia.com>
Add the memory-region and memory-region-names properties to the bindings
for the display controllers and the host1x engine found on various Tegra
generations. These memory regions are used to access firmware-provided
framebuffer memory as well as the video protection region.
Signed-off-by: Thierry Reding <tred...@nvidia.com>
---
.../bindings/display/tegra/nvidia,tegra186-dc.yaml | 10 ++++++++++
.../bindings/display/tegra/nvidia,tegra20-dc.yaml | 10 +++++++++-
.../bindings/display/tegra/nvidia,tegra20-host1x.yaml | 7 +++++++
3 files changed, 26 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml
b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml
index ce4589466a18..881bfbf4764d 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra186-dc.yaml
@@ -57,6 +57,16 @@ properties:
- const: dma-mem # read-0
- const: read-1
+ memory-region:
+ minItems: 1
+ maxItems: 2
+
+ memory-region-names:
+ items:
+ enum: [ framebuffer, protected ]
+ minItems: 1
+ maxItems: 2
+
nvidia,outputs:
description: A list of phandles of outputs that this display
controller can drive.
diff --git
a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
index 69be95afd562..a012644eeb7d 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml
@@ -65,7 +65,15 @@ properties:
items:
- description: phandle to the core power domain
- memory-region: true
+ memory-region:
+ minItems: 1
+ maxItems: 2
+
+ memory-region-names:
+ items:
+ enum: [ framebuffer, protected ]
+ minItems: 1
+ maxitems: 2
nvidia,head:
$ref: /schemas/types.yaml#/definitions/uint32
diff --git
a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml
b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml
index 3563378a01af..f45be30835a8 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml
@@ -96,6 +96,13 @@ properties:
items:
- description: phandle to the HEG or core power domain
+ memory-region:
+ maxItems: 1
+
+ memory-region-names:
+ items:
+ - const: protected
+
required:
- compatible
- interrupts
--
2.50.0
