On 07/09/2025 11:43, Svyatoslav Ryhel wrote: > нд, 7 вер. 2025 р. о 12:34 Krzysztof Kozlowski <[email protected]> пише: >> >> On Sat, Sep 06, 2025 at 04:53:23PM +0300, Svyatoslav Ryhel wrote: >>> Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers. >>> Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into >>> clk-tegra30 source. >>> >>> Signed-off-by: Svyatoslav Ryhel <[email protected]> >>> --- >>> drivers/clk/tegra/clk-tegra30.c | 1 + >>> include/dt-bindings/clock/tegra30-car.h | 3 ++- >>> 2 files changed, 3 insertions(+), 1 deletion(-) >>> >>> diff --git a/drivers/clk/tegra/clk-tegra30.c >>> b/drivers/clk/tegra/clk-tegra30.c >>> index ca367184e185..ca738bc64615 100644 >>> --- a/drivers/clk/tegra/clk-tegra30.c >>> +++ b/drivers/clk/tegra/clk-tegra30.c >>> @@ -53,6 +53,7 @@ >>> #define SYSTEM_CLK_RATE 0x030 >>> >>> #define TEGRA30_CLK_PERIPH_BANKS 5 >>> +#define TEGRA30_CLK_CLK_MAX 311 >> >> Unused define drop. >> > > Specify, your comment is not clear. > >> Also, don't mix bindings and drivers. You cannot create such >> dependencies. > > I literally did what you told me to do! TEGRA30_CLK_CLK_MAX was > removed from binding, but it is used by the driver, so how you propose
I missed that you remove here old CLK_MAX... well, you did it quite different than all other cases leading to driver-binding dependency. Really, I thought you will just fix it immediately after my feedback and then new bindings come later, just like we did for every other SoC. > to handle this without redefining TEGRA30_CLK_CLK_MAX and breaking > build with missing TEGRA30_CLK_CLK_MAX? There is really no problem there and if you put here at least some effort you would see how everyone else did it - add define to the driver in cleanup series, month ago or so and then change bindings. Fine to do it that way Acked-by: Krzysztof Kozlowski <[email protected]> Best regards, Krzysztof
