On 08/09/2025 23:14, Dmitry Baryshkov wrote:
On Mon, Sep 08, 2025 at 03:04:20PM +0200, Neil Armstrong wrote:
The QMP USB3/DP Combo PHY hosts an USB3 phy and a DP PHY on top
of a combo glue to route either lanes to the 4 shared physical lanes.
The routing of the lanes can be:
- 2 DP + 2 USB3
- 4 DP
- 2 USB3
The layout of the lanes was designed to be mapped and swapped
related to the USB-C Power Delivery negociation, so it supports
a finite set of mappings inherited by the USB-C Altmode layouts.
Nevertheless those QMP Comby PHY can be used to drive a DisplayPort
connector, DP->HDMI bridge, USB3 A Connector, etc... without
an USB-C connector and no PD events.
Document the data-lanes on numbered port@0 out endpoints,
allowing us to document the lanes mapping to DisplayPort
and/or USB3 connectors/peripherals.
Signed-off-by: Neil Armstrong <neil.armstr...@linaro.org>
---
.../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 59 +++++++++++++++++++++-
1 file changed, 58 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
index
5005514d7c3a1e4a8893883497fd204bc04e12be..51e0d0983091af0b8a5170ac34a05ab0acc435a3
100644
--- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
@@ -81,10 +81,67 @@ properties:
ports:
$ref: /schemas/graph.yaml#/properties/ports
+
properties:
port@0:
- $ref: /schemas/graph.yaml#/properties/port
+ $ref: /schemas/graph.yaml#/$defs/port-base
description: Output endpoint of the PHY
+ unevaluatedProperties: false
+
+ properties:
+ endpoint:
+ $ref: /schemas/graph.yaml#/$defs/endpoint-base
+ unevaluatedProperties: false
+
+ endpoint@0:
+ $ref: /schemas/graph.yaml#/$defs/endpoint-base
+ description: Display Port Output lanes of the PHY when used with
static mapping
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
Nit: DP can work in a 1-lane mode. Do we nned to support that in the PHY?
So the PHY already supports 1-lane, but the QMP Combo only supports
mapping 2+2 or 4, but nevetheless we can still decscribe 1 lane in DT
int both in & out endpoint and still should work fine.
Do you think this should be done now ?
Neil
+ maxItems: 4
+ oneOf:
+ - items: # DisplayPort 2 lanes, normal orientation
+ - const: 0
+ - const: 1
+ - items: # DisplayPort 2 lanes, flipped orientation
+ - const: 3
+ - const: 2
+ - items: # DisplayPort 4 lanes, normal orientation
+ - const: 0
+ - const: 1
+ - const: 2
+ - const: 3
+ - items: # DisplayPort 4 lanes, flipped orientation
+ - const: 3
+ - const: 2
+ - const: 1
+ - const: 0
+ required:
+ - data-lanes
+
+ endpoint@1:
+ $ref: /schemas/graph.yaml#/$defs/endpoint-base
+ description: USB Output lanes of the PHY when used with static
mapping
+ unevaluatedProperties: false
+
+ properties:
+ data-lanes:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ minItems: 2
+ oneOf:
+ - items: # USB3, normal orientation
+ - const: 1
+ - const: 0
+ - items: # USB3, flipped orientation
+ - const: 2
+ - const: 3
+
+ required:
+ - data-lanes
port@1:
$ref: /schemas/graph.yaml#/properties/port
--
2.34.1
