Hi Dave, Simona, Pull for v6.18, as described below.
The following changes since commit 3cf6147f2b51a569761e1ef010efbd891e3a3a15: soc: qcom: use no-UBWC config for MSM8956/76 (2025-08-25 14:01:26 -0700) are available in the Git repository at: https://gitlab.freedesktop.org/drm/msm.git tags/drm-msm-next-2025-09-12 for you to fetch changes up to b5bad77e1e3c7249e4c0c88f98477e1ee7669b63: drm/msm/registers: Sync GPU registers from mesa (2025-09-10 14:48:12 -0700) ---------------------------------------------------------------- Changes for v6.18 GPU and Core: - in DT bindings describe clocks per GPU type - GMU bandwidth voting for x1-85 - a663 speedbins - a623 speedbins - cleanup some remaining no-iommu leftovers after VM_BIND conversion - fix GEM obj 32b size truncation - add missing VM_BIND param validation - various fixes - IFPC for x1-85 and a750 - register xml and gen_header.py sync from mesa Display: - add missing bindings for display on SC8180X - added DisplayPort MST bindings - conversion from round_rate() to determine_rate() - DSI PHY fixes, correcting programming glitches - misc small fixes ---------------------------------------------------------------- Abhinav Kumar (4): dt-bindings: display/msm: qcom,x1e80100-mdss: correct DP addresses dt-bindings: display/msm: dp-controller: add X1E80100 dt-bindings: display/msm: drop assigned-clock-parents for dp controller dt-bindings: display/msm: expand to support MST Akhil P Oommen (21): drm/msm/adreno: Add speedbins for A663 GPU drm/msm/adreno: Add speedbin data for A623 GPU drm/msm: Update GMU register xml drm/msm: a6xx: Fix gx_is_on check for a7x family drm/msm/a6xx: Poll additional DRV status drm/msm/a6xx: Fix PDC sleep sequence drm/msm: a6xx: Refactor a6xx_sptprac_enable() drm/msm: Add an ftrace for gpu register access drm/msm/adreno: Add fenced regwrite support drm/msm/a6xx: Set Keep-alive votes to block IFPC drm/msm/a6xx: Switch to GMU AO counter drm/msm/a6xx: Poll AHB fence status in GPU IRQ handler drm/msm: Add support for IFPC drm/msm/a6xx: Fix hangcheck for IFPC drm/msm/adreno: Disable IFPC when sysprof is active drm/msm/a6xx: Make crashstate capture IFPC safe drm/msm/a6xx: Enable IFPC on Adreno X1-85 drm/msm/a6xx: Enable IFPC on A750 GPU drm/msm: Fix bootup splat with separate_gpu_drm modparam drm/msm/adreno: Add a modparam to skip GPU drm/msm/a6xx: Add a comment to acd_probe() Antonino Maniscalco (1): drm/msm: make sure to not queue up recovery more than once Barnabás Czémán (1): dt-bindings: display/msm/gpu: describe A505 clocks Brian Masney (9): drm/msm/dsi_phy_10nm: convert from round_rate() to determine_rate() drm/msm/dsi_phy_14nm: convert from round_rate() to determine_rate() drm/msm/dsi_phy_28nm_8960: convert from round_rate() to determine_rate() drm/msm/dsi_phy_28nm: convert from round_rate() to determine_rate() drm/msm/dsi_phy_7nm: convert from round_rate() to determine_rate() drm/msm/hdmi_phy_8996: convert from round_rate() to determine_rate() drm/msm/hdmi_phy_8998: convert from round_rate() to determine_rate() drm/msm/disp/mdp4/mdp4_lvds_pll: convert from round_rate() to determine_rate() drm/msm/hdmi_pll_8960: convert from round_rate() to determine_rate() Christophe JAILLET (1): drm/msm/mdp4: Consistently use the "mdp4_" namespace Colin Ian King (1): drm/msm: remove extraneous semicolon after a statement Dmitry Baryshkov (14): dt-bindings: display/msm/gpu: account for 7xx GPUs in clocks conditions dt-bindings: display/msm/gpu: describe alwayson clock dt-bindings: display/msm/gpu: describe clocks for each Adreno GPU type dt-bindings: display/msm: dsi-controller-main: add SC8180X dt-bindings: display/msm: describe DPU on SC8180X dt-bindings: display/msm: describe MDSS on SC8180X drm/msm/dpu: use drmm_writeback_connector_init() dt-bindings: display/msm: dp-controller: allow eDP for SA8775P dt-bindings: display/msm: dp-controller: fix fallback for SM6350 dt-bindings: display/msm: dp-controller: document DP on SM7150 drm/msm/mdp4: stop supporting no-IOMMU configuration drm/msm: stop supporting no-IOMMU configuration drm/msm: don't return NULL from msm_iommu_new() drm/msm/mdp4: use msm_kms_init_vm() instead of duplicating it Jessica Zhang (2): drm/msm/dpu: Filter modes based on adjusted mode clock drm/msm/dpu: Drop maxwidth from dpu_lm_sub_blks struct Jie Zhang (1): dt-bindings: display/msm/gmu: Update Adreno 623 bindings Jiri Slaby (SUSE) (1): drm/msm: use dev_fwnode() Jun Nie (3): drm/msm: Do not validate SSPP when it is not ready drm/msm/dpu: polish log for resource allocation drm/msm/dpu: decide right side per last bit Krzysztof Kozlowski (4): drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields drm/msm/dsi/phy_7nm: Fix missing initial VCO rate drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared Liao Yuanhong (1): drm/msm/mdp4: remove the use of dev_err_probe() Neil Armstrong (1): drm/msm: adreno: a6xx: enable GMU bandwidth voting for x1e80100 GPU Qianfeng Rong (1): drm/msm/dpu: fix incorrect type for ret Rob Clark (9): drm/msm: Fix obj leak in VM_BIND error path drm/msm: Fix missing VM_BIND offset/range validation drm/msm: Fix 32b size truncation drm/msm: Drop unneeded NULL check drm/msm/registers: Remove license/etc from generated headers drm/msm/registers: Sync gen_header.py from mesa drm/msm/registers: Make TPL1_BICUBIC_WEIGHTS_TABLE an array drm/msm/registers: Generate _HI/LO builders for reg64 drm/msm/registers: Sync GPU registers from mesa Rob Herring (Arm) (1): drm/msm: Use of_reserved_mem_region_to_resource() for "memory-region" .../bindings/display/msm/dp-controller.yaml | 146 ++++- .../bindings/display/msm/dsi-controller-main.yaml | 2 + .../devicetree/bindings/display/msm/gmu.yaml | 34 + .../devicetree/bindings/display/msm/gpu.yaml | 223 ++++++- .../bindings/display/msm/qcom,sa8775p-mdss.yaml | 26 +- .../bindings/display/msm/qcom,sar2130p-mdss.yaml | 10 +- .../bindings/display/msm/qcom,sc7280-mdss.yaml | 3 +- .../bindings/display/msm/qcom,sc8180x-dpu.yaml | 103 +++ .../bindings/display/msm/qcom,sc8180x-mdss.yaml | 359 +++++++++++ .../bindings/display/msm/qcom,sm7150-mdss.yaml | 16 +- .../bindings/display/msm/qcom,sm8750-mdss.yaml | 10 +- .../bindings/display/msm/qcom,x1e80100-mdss.yaml | 20 +- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 92 ++- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 108 +++- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 14 + drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 242 +++++-- drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 3 + drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c | 10 +- drivers/gpu/drm/msm/adreno/a6xx_hfi.c | 34 +- drivers/gpu/drm/msm/adreno/a6xx_preempt.c | 44 +- drivers/gpu/drm/msm/adreno/adreno_device.c | 13 + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 21 +- drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 35 +- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.h | 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 17 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 5 - drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 2 +- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 4 + drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 23 +- drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c | 10 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 29 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.h | 2 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_lcdc_encoder.c | 2 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_lvds_pll.c | 47 +- drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 2 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy.h | 1 + drivers/gpu/drm/msm/dsi/phy/dsi_phy_10nm.c | 16 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_14nm.c | 34 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm.c | 21 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_28nm_8960.c | 32 +- drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 95 ++- drivers/gpu/drm/msm/hdmi/hdmi_phy_8996.c | 16 +- drivers/gpu/drm/msm/hdmi/hdmi_phy_8998.c | 16 +- drivers/gpu/drm/msm/hdmi/hdmi_pll_8960.c | 12 +- drivers/gpu/drm/msm/msm_drv.c | 1 + drivers/gpu/drm/msm/msm_drv.h | 2 +- drivers/gpu/drm/msm/msm_gem.c | 21 +- drivers/gpu/drm/msm/msm_gem.h | 6 +- drivers/gpu/drm/msm/msm_gem_prime.c | 2 +- drivers/gpu/drm/msm/msm_gem_vma.c | 31 +- drivers/gpu/drm/msm/msm_gpu.c | 2 +- drivers/gpu/drm/msm/msm_gpu.h | 9 + drivers/gpu/drm/msm/msm_gpu_trace.h | 12 + drivers/gpu/drm/msm/msm_iommu.c | 8 +- drivers/gpu/drm/msm/msm_kms.c | 14 +- drivers/gpu/drm/msm/msm_mdss.c | 3 +- drivers/gpu/drm/msm/msm_submitqueue.c | 4 + drivers/gpu/drm/msm/registers/adreno/a6xx.xml | 718 ++++++++++++--------- .../drm/msm/registers/adreno/a6xx_descriptors.xml | 40 -- .../gpu/drm/msm/registers/adreno/a6xx_enums.xml | 50 +- drivers/gpu/drm/msm/registers/adreno/a6xx_gmu.xml | 11 + .../gpu/drm/msm/registers/adreno/adreno_pm4.xml | 179 ++--- .../gpu/drm/msm/registers/display/dsi_phy_7nm.xml | 11 +- drivers/gpu/drm/msm/registers/gen_header.py | 201 +++--- 67 files changed, 2340 insertions(+), 946 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc8180x-dpu.yaml create mode 100644 Documentation/devicetree/bindings/display/msm/qcom,sc8180x-mdss.yaml
