On Fri, Sep 12, 2025 at 02:14:18PM -0400, Frank Li wrote:
> Convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml format.
>
> Additional changes:
> - Only keep one example.
>
> Signed-off-by: Frank Li <frank...@nxp.com>
> ---
> .../megachips,stdp2690-ge-b850v3-fw.yaml | 105 ++++++++++++++++++
> .../megachips-stdpxxxx-ge-b850v3-fw.txt | 91 ---------------
> 2 files changed, 105 insertions(+), 91 deletions(-)
> create mode 100644
> Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml
> delete mode 100644
> Documentation/devicetree/bindings/display/bridge/megachips-stdpxxxx-ge-b850v3-fw.txt
>
> diff --git
> a/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml
>
> b/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml
> new file mode 100644
> index 0000000000000..6b5cfc41f7414
> --- /dev/null
> +++
> b/Documentation/devicetree/bindings/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml
> @@ -0,0 +1,105 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id:
> http://devicetree.org/schemas/display/bridge/megachips,stdp2690-ge-b850v3-fw.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: GE B850v3 video bridge
> +
> +maintainers:
> + - Frank Li <frank...@nxp.com>
> +
> +description: |
> + STDP4028-ge-b850v3-fw bridges (LVDS-DP)
> + STDP2690-ge-b850v3-fw bridges (DP-DP++)
> +
> + The video processing pipeline on the second output on the GE B850v3:
> +
> + Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
> +
> + Each bridge has a dedicated flash containing firmware for supporting the
> custom
> + design. The result is that, in this design, neither the STDP4028 nor the
> + STDP2690 behave as the stock bridges would. The compatible strings
> include the
> + suffix "-ge-b850v3-fw" to make it clear that the driver is for the
> bridges with
> + the firmware specific for the GE B850v3.
> +
> + The hardware do not provide control over the video processing pipeline,
> as the
> + two bridges behaves as a single one. The only interfaces exposed by the
> + hardware are EDID, HPD, and interrupts.
> +
> +properties:
> + compatible:
> + enum:
> + - megachips,stdp4028-ge-b850v3-fw
> + - megachips,stdp2690-ge-b850v3-fw
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + ports:
> + $ref: /schemas/graph.yaml#/properties/ports
> + properties:
> + port@0:
> + $ref: /schemas/graph.yaml#/properties/port
Need to state this is the input port.
> +
> + port@1:
> + $ref: /schemas/graph.yaml#/properties/port
And this is the output.
Aren't both required as well?
> +
> +required:
> + - compatible
> + - reg
> + - ports
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: megachips,stdp4028-ge-b850v3-fw
> + then:
> + required:
> + - interrupts
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/irq.h>
> +
> + i2c {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + bridge@73 {
> + compatible = "megachips,stdp4028-ge-b850v3-fw";
> + reg = <0x73>;
> + interrupt-parent = <&gpio2>;
> + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> +
> + endpoint {
> + remote-endpoint = <&lvds0_out>;
> + };
> +
> + };
> +
> + port@1 {
> + reg = <1>;
> +
> + endpoint {
> + remote-endpoint = <&stdp2690_in>;
> + };
> + };
> + };
> + };
> + };
> +
