On 13/09/25 12:12, Swamil Jain wrote:
From: Aradhya Bhatia <a-bhat...@ti.com>

The AM625 SoC has 2 OLDI TXes under the DSS. Add their support.

Signed-off-by: Aradhya Bhatia <a-bhat...@ti.com>
Signed-off-by: Swamil Jain <s-ja...@ti.com>

Reviewed-by: Devarsh Thakkar <devar...@ti.com>

Regards
Devarsh

---
  arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 47 ++++++++++++++++++++++++
  1 file changed, 47 insertions(+)

diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi 
b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
index dcc71db8afd4..d240c157d819 100644
--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi
@@ -793,6 +793,53 @@ dss: dss@30200000 {
                interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
                status = "disabled";
+ oldi-transmitters {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       oldi0: oldi@0 {
+                               reg = <0>;
+                               clocks = <&k3_clks 186 0>;
+                               clock-names = "serial";
+                               ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
+                               status = "disabled";
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       oldi0_port0: port@0 {
+                                               reg = <0>;
+                                       };
+
+                                       oldi0_port1: port@1 {
+                                               reg = <1>;
+                                       };
+                               };
+                       };
+
+                       oldi1: oldi@1 {
+                               reg = <1>;
+                               clocks = <&k3_clks 186 0>;
+                               clock-names = "serial";
+                               ti,oldi-io-ctrl = <&dss_oldi_io_ctrl>;
+                               status = "disabled";
+
+                               ports {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       oldi1_port0: port@0 {
+                                               reg = <0>;
+                                       };
+
+                                       oldi1_port1: port@1 {
+                                               reg = <1>;
+                                       };
+                               };
+                       };
+               };
+
                dss_ports: ports {
                        #address-cells = <1>;
                        #size-cells = <0>;

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