On Wed, Aug 27, 2025 at 3:28 AM Alistair Popple <apop...@nvidia.com> wrote:
>
> +register!(NV_PRISCV_RISCV_CPUCTL @ PFalconBase[0x00001388] {
> +    7:7     active_stat as bool;
> +    0:0     halted as bool;
> +});

Two more things I've noticed:

1) I think the convention is to list the bits in increase position.
That is, 'active_stat' should be on the line below 'halted''

2) I think that this should actually be PFalcon2Base[0x00000388]

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