The GSP requires several areas of memory to operate. Each of these have their own simple embedded page tables. Set these up and map them for DMA to/from GSP using CoherentAllocation's. Return the DMA handle describing where each of these regions are for future use when booting GSP.
Signed-off-by: Alistair Popple <[email protected]> --- Change for v3: - Clean up the PTE array creation, with much thanks to Alex for doing most it (please let me know if I should put you as co-developer!) Changes for v2: - Renamed GspMemOjbects to Gsp as that is what they are - Rebased on Alex's latest series --- drivers/gpu/nova-core/gpu.rs | 2 +- drivers/gpu/nova-core/gsp.rs | 79 +++++++++++++++++-- drivers/gpu/nova-core/gsp/fw.rs | 39 +++++++++ .../gpu/nova-core/gsp/fw/r570_144/bindings.rs | 19 +++++ 4 files changed, 133 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index ea124d1912e7..c1396775e9b6 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -197,7 +197,7 @@ pub(crate) fn new<'a>( sec2_falcon: Falcon::new(pdev.as_ref(), spec.chipset, bar, true)?, - gsp <- Gsp::new(), + gsp <- Gsp::new(pdev)?, _: { gsp.boot(pdev, bar, spec.chipset, gsp_falcon, sec2_falcon)? }, diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs index 221281da1a45..63099df77348 100644 --- a/drivers/gpu/nova-core/gsp.rs +++ b/drivers/gpu/nova-core/gsp.rs @@ -2,25 +2,94 @@ mod boot; +use kernel::device; +use kernel::dma::CoherentAllocation; +use kernel::dma::DmaAddress; +use kernel::dma_write; +use kernel::pci; use kernel::prelude::*; use kernel::ptr::Alignment; +use kernel::transmute::AsBytes; pub(crate) use fw::{GspFwWprMeta, LibosParams}; mod fw; +use fw::LibosMemoryRegionInitArgument; + pub(crate) const GSP_PAGE_SHIFT: usize = 12; pub(crate) const GSP_PAGE_SIZE: usize = 1 << GSP_PAGE_SHIFT; pub(crate) const GSP_HEAP_ALIGNMENT: Alignment = Alignment::new::<{ 1 << 20 }>(); +/// Number of GSP pages to use in a RM log buffer. +const RM_LOG_BUFFER_NUM_PAGES: usize = 0x10; + /// GSP runtime data. -/// -/// This is an empty pinned placeholder for now. #[pin_data] -pub(crate) struct Gsp {} +pub(crate) struct Gsp { + libos: CoherentAllocation<LibosMemoryRegionInitArgument>, + pub loginit: CoherentAllocation<u8>, + pub logintr: CoherentAllocation<u8>, + pub logrm: CoherentAllocation<u8>, +} + +#[repr(C)] +struct PteArray<const NUM_ENTRIES: usize>([u64; NUM_ENTRIES]); +/// SAFETY: arrays of `u64` implement `AsBytes` and we are but a wrapper around it. +unsafe impl<const NUM_ENTRIES: usize> AsBytes for PteArray<NUM_ENTRIES> {} +impl<const NUM_PAGES: usize> PteArray<NUM_PAGES> { + fn new(handle: DmaAddress) -> Self { + let mut ptes = [0u64; NUM_PAGES]; + for (i, pte) in ptes.iter_mut().enumerate() { + *pte = handle + ((i as u64) << GSP_PAGE_SHIFT); + } + + Self(ptes) + } +} + +/// Creates a new `CoherentAllocation<A>` with `name` of `size` elements, and +/// register it into the `libos` object at argument position `libos_arg_nr`. +fn create_logbuffer_dma_object( + dev: &device::Device<device::Bound>, +) -> Result<CoherentAllocation<u8>> { + let mut obj = CoherentAllocation::<u8>::alloc_coherent( + dev, + RM_LOG_BUFFER_NUM_PAGES * GSP_PAGE_SIZE, + GFP_KERNEL | __GFP_ZERO, + )?; + let ptes = PteArray::<RM_LOG_BUFFER_NUM_PAGES>::new(obj.dma_handle()); + + // SAFETY: `obj` has just been created and we are its sole user. + unsafe { + // Copy the self-mapping PTE at the expected location. + obj.as_slice_mut(size_of::<u64>(), size_of_val(&ptes))? + .copy_from_slice(ptes.as_bytes()) + }; + + Ok(obj) +} impl Gsp { - pub(crate) fn new() -> impl PinInit<Self> { - pin_init!(Self {}) + pub(crate) fn new(pdev: &pci::Device<device::Bound>) -> Result<impl PinInit<Self, Error>> { + let dev = pdev.as_ref(); + let libos = CoherentAllocation::<LibosMemoryRegionInitArgument>::alloc_coherent( + dev, + GSP_PAGE_SIZE / size_of::<LibosMemoryRegionInitArgument>(), + GFP_KERNEL | __GFP_ZERO, + )?; + let loginit = create_logbuffer_dma_object(dev)?; + dma_write!(libos[0] = LibosMemoryRegionInitArgument::new("LOGINIT", &loginit))?; + let logintr = create_logbuffer_dma_object(dev)?; + dma_write!(libos[1] = LibosMemoryRegionInitArgument::new("LOGINTR", &logintr))?; + let logrm = create_logbuffer_dma_object(dev)?; + dma_write!(libos[2] = LibosMemoryRegionInitArgument::new("LOGRM", &logrm))?; + + Ok(try_pin_init!(Self { + libos, + loginit, + logintr, + logrm, + })) } } diff --git a/drivers/gpu/nova-core/gsp/fw.rs b/drivers/gpu/nova-core/gsp/fw.rs index 181baa401770..dd1e7fc85d85 100644 --- a/drivers/gpu/nova-core/gsp/fw.rs +++ b/drivers/gpu/nova-core/gsp/fw.rs @@ -7,8 +7,10 @@ use core::ops::Range; +use kernel::dma::CoherentAllocation; use kernel::ptr::Alignable; use kernel::sizes::SZ_1M; +use kernel::transmute::{AsBytes, FromBytes}; use crate::gpu::Chipset; use crate::gsp; @@ -99,3 +101,40 @@ pub(crate) fn wpr_heap_size(&self, chipset: Chipset, fb_size: u64) -> u64 { /// addresses of the GSP bootloader and firmware. #[repr(transparent)] pub(crate) struct GspFwWprMeta(bindings::GspFwWprMeta); + +#[repr(transparent)] +pub(crate) struct LibosMemoryRegionInitArgument(bindings::LibosMemoryRegionInitArgument); + +// SAFETY: Padding is explicit and will not contain uninitialized data. +unsafe impl AsBytes for LibosMemoryRegionInitArgument {} + +// SAFETY: This struct only contains integer types for which all bit patterns +// are valid. +unsafe impl FromBytes for LibosMemoryRegionInitArgument {} + +impl LibosMemoryRegionInitArgument { + pub(crate) fn new<A: AsBytes + FromBytes>( + name: &'static str, + obj: &CoherentAllocation<A>, + ) -> Self { + /// Generates the `ID8` identifier required for some GSP objects. + fn id8(name: &str) -> u64 { + let mut bytes = [0u8; core::mem::size_of::<u64>()]; + + for (c, b) in name.bytes().rev().zip(&mut bytes) { + *b = c; + } + + u64::from_ne_bytes(bytes) + } + + Self(bindings::LibosMemoryRegionInitArgument { + id8: id8(name), + pa: obj.dma_handle(), + size: obj.size() as u64, + kind: bindings::LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONTIGUOUS as u8, + loc: bindings::LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SYSMEM as u8, + ..Default::default() + }) + } +} diff --git a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs index 0407000cca22..6a14cc324391 100644 --- a/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs +++ b/drivers/gpu/nova-core/gsp/fw/r570_144/bindings.rs @@ -124,3 +124,22 @@ fn default() -> Self { } } } +pub type LibosAddress = u64_; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_NONE: LibosMemoryRegionKind = 0; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_CONTIGUOUS: LibosMemoryRegionKind = 1; +pub const LibosMemoryRegionKind_LIBOS_MEMORY_REGION_RADIX3: LibosMemoryRegionKind = 2; +pub type LibosMemoryRegionKind = ffi::c_uint; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_NONE: LibosMemoryRegionLoc = 0; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_SYSMEM: LibosMemoryRegionLoc = 1; +pub const LibosMemoryRegionLoc_LIBOS_MEMORY_REGION_LOC_FB: LibosMemoryRegionLoc = 2; +pub type LibosMemoryRegionLoc = ffi::c_uint; +#[repr(C)] +#[derive(Debug, Default, Copy, Clone)] +pub struct LibosMemoryRegionInitArgument { + pub id8: LibosAddress, + pub pa: LibosAddress, + pub size: LibosAddress, + pub kind: u8_, + pub loc: u8_, + pub __bindgen_padding_0: [u8; 6usize], +} -- 2.50.1
