[PATCH v5 5/7] drm/edid: for consistency, use mask everywhere for block rev parsing

[Yaroslav Bolyukin]

Signed-off-by: Yaroslav Bolyukin <i...@lach.pw>
---
 drivers/gpu/drm/drm_displayid_internal.h | 1 +
 drivers/gpu/drm/drm_edid.c               | 3 ++-
 2 files changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_displayid_internal.h 
b/drivers/gpu/drm/drm_displayid_internal.h
index 8ea20b1c6921..38f9d628e2d6 100644
--- a/drivers/gpu/drm/drm_displayid_internal.h
+++ b/drivers/gpu/drm/drm_displayid_internal.h
@@ -139,6 +139,7 @@ struct displayid_formula_timings_9 {
        u8 vrefresh;
 } __packed;
 
+#define DISPLAYID_BLOCK_DESCRIPTOR_PAYLOAD_BYTES       GENMASK(6, 4)
 struct displayid_formula_timing_block {
        struct displayid_block base;
        struct displayid_formula_timings_9 timings[];
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index a1dc4331c4cb..4fa39989e446 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6903,7 +6903,8 @@ static int add_displayid_formula_modes(struct 
drm_connector *connector,
        struct drm_display_mode *newmode;
        int num_modes = 0;
        bool type_10 = block->tag == DATA_BLOCK_2_TYPE_10_FORMULA_TIMING;
-       int timing_size = 6 + ((formula_block->base.rev & 0x70) >> 4);
+       int timing_size = 6 +
+               FIELD_GET(DISPLAYID_BLOCK_DESCRIPTOR_PAYLOAD_BYTES, 
formula_block->base.rev);
 
        /* extended blocks are not supported yet */
        if (timing_size != 6)
-- 
2.51.0