i.MX95 Display Controller display engine consists of all processing
units that operate in a display clock domain. Document DomainBlend
block which is specific to i.MX95 and required to get any display
output on that SoC.

Signed-off-by: Marek Vasut <[email protected]>
---
Cc: Abel Vesa <[email protected]>
Cc: Conor Dooley <[email protected]>
Cc: Fabio Estevam <[email protected]>
Cc: Krzysztof Kozlowski <[email protected]>
Cc: Laurent Pinchart <[email protected]>
Cc: Liu Ying <[email protected]>
Cc: Lucas Stach <[email protected]>
Cc: Peng Fan <[email protected]>
Cc: Pengutronix Kernel Team <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Shawn Guo <[email protected]>
Cc: Thomas Zimmermann <[email protected]>
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
Cc: [email protected]
---
 .../display/imx/fsl,imx95-dc-domainblend.yaml | 32 +++++++++++++++++++
 1 file changed, 32 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/display/imx/fsl,imx95-dc-domainblend.yaml

diff --git 
a/Documentation/devicetree/bindings/display/imx/fsl,imx95-dc-domainblend.yaml 
b/Documentation/devicetree/bindings/display/imx/fsl,imx95-dc-domainblend.yaml
new file mode 100644
index 0000000000000..703f98e3321e8
--- /dev/null
+++ 
b/Documentation/devicetree/bindings/display/imx/fsl,imx95-dc-domainblend.yaml
@@ -0,0 +1,32 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/imx/fsl,imx95-dc-domainblend.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX95 Display Controller Domain Blend Unit
+
+description: Combines two input frames to a single output frame.
+
+maintainers:
+  - Marek Vasut <[email protected]>
+
+properties:
+  compatible:
+    const: fsl,imx95-dc-domainblend
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+additionalProperties: false
+
+examples:
+  - |
+    domainblend@4b6a0000 {
+        compatible = "fsl,imx95-dc-domainblend";
+        reg = <0x4b6a0000 0x10>;
+    };
-- 
2.51.0

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