Compute the values for second scaler for sharpness. Fill the register bits corresponding to the scaler.
v1: Rename the title of patch [Ankit] v2: Remove setup_casf from here[Ankit] v3: Add skl_scaler_setup_casf in casf_enable Signed-off-by: Nemesa Garg <[email protected]> Reviewed-by: Ankit Nautiyal <[email protected]> --- drivers/gpu/drm/i915/display/intel_casf.c | 6 +++ drivers/gpu/drm/i915/display/skl_scaler.c | 46 +++++++++++++++++++++++ drivers/gpu/drm/i915/display/skl_scaler.h | 2 + 3 files changed, 54 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_casf.c b/drivers/gpu/drm/i915/display/intel_casf.c index 91f2362405b9..8c84a1759919 100644 --- a/drivers/gpu/drm/i915/display/intel_casf.c +++ b/drivers/gpu/drm/i915/display/intel_casf.c @@ -12,6 +12,7 @@ #include "intel_de.h" #include "intel_display_regs.h" #include "intel_display_types.h" +#include "skl_scaler.h" #define MAX_PIXELS_FOR_3_TAP_FILTER (1920 * 1080) #define MAX_PIXELS_FOR_5_TAP_FILTER (3840 * 2160) @@ -268,6 +269,8 @@ void intel_casf_enable(struct intel_crtc_state *crtc_state) sharpness_ctl |= crtc_state->hw.casf_params.win_size; intel_de_write(display, SHARPNESS_CTL(crtc->pipe), sharpness_ctl); + + skl_scaler_setup_casf(crtc_state); } void intel_casf_disable(const struct intel_crtc_state *crtc_state) @@ -275,5 +278,8 @@ void intel_casf_disable(const struct intel_crtc_state *crtc_state) struct intel_display *display = to_intel_display(crtc_state); struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + intel_de_write(display, SKL_PS_CTRL(crtc->pipe, 1), 0); + intel_de_write(display, SKL_PS_WIN_POS(crtc->pipe, 1), 0); intel_de_write(display, SHARPNESS_CTL(crtc->pipe), 0); + intel_de_write(display, SKL_PS_WIN_SZ(crtc->pipe, 1), 0); } diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c b/drivers/gpu/drm/i915/display/skl_scaler.c index 19aeb8d5b79c..33ad1dd16bb2 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.c +++ b/drivers/gpu/drm/i915/display/skl_scaler.c @@ -739,6 +739,52 @@ static void skl_scaler_setup_filter(struct intel_display *display, } } +#define CASF_SCALER_FILTER_SELECT \ + (PS_FILTER_PROGRAMMED | \ + PS_Y_VERT_FILTER_SELECT(0) | \ + PS_Y_HORZ_FILTER_SELECT(0) | \ + PS_UV_VERT_FILTER_SELECT(0) | \ + PS_UV_HORZ_FILTER_SELECT(0)) + +void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state) +{ + struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); + struct intel_display *display = to_intel_display(crtc); + struct drm_display_mode *adjusted_mode = + &crtc_state->hw.adjusted_mode; + struct intel_crtc_scaler_state *scaler_state = + &crtc_state->scaler_state; + struct drm_rect src, dest; + int id, width, height; + int x = 0, y = 0; + enum pipe pipe = crtc->pipe; + u32 ps_ctrl; + + width = adjusted_mode->crtc_hdisplay; + height = adjusted_mode->crtc_vdisplay; + + drm_rect_init(&dest, x, y, width, height); + + width = drm_rect_width(&dest); + height = drm_rect_height(&dest); + id = scaler_state->scaler_id; + + drm_rect_init(&src, 0, 0, + drm_rect_width(&crtc_state->pipe_src) << 16, + drm_rect_height(&crtc_state->pipe_src) << 16); + + trace_intel_pipe_scaler_update_arm(crtc, id, x, y, width, height); + + ps_ctrl = PS_SCALER_EN | PS_BINDING_PIPE | scaler_state->scalers[id].mode | + CASF_SCALER_FILTER_SELECT; + + intel_de_write_fw(display, SKL_PS_CTRL(pipe, id), ps_ctrl); + intel_de_write_fw(display, SKL_PS_WIN_POS(pipe, id), + PS_WIN_XPOS(x) | PS_WIN_YPOS(y)); + intel_de_write_fw(display, SKL_PS_WIN_SZ(pipe, id), + PS_WIN_XSIZE(width) | PS_WIN_YSIZE(height)); +} + void skl_pfit_enable(const struct intel_crtc_state *crtc_state) { struct intel_display *display = to_intel_display(crtc_state); diff --git a/drivers/gpu/drm/i915/display/skl_scaler.h b/drivers/gpu/drm/i915/display/skl_scaler.h index 12a19016c5f6..f2256984a97e 100644 --- a/drivers/gpu/drm/i915/display/skl_scaler.h +++ b/drivers/gpu/drm/i915/display/skl_scaler.h @@ -36,6 +36,8 @@ void skl_scaler_disable(const struct intel_crtc_state *old_crtc_state); void skl_scaler_get_config(struct intel_crtc_state *crtc_state); +void skl_scaler_setup_casf(struct intel_crtc_state *crtc_state); + enum drm_mode_status skl_scaler_mode_valid(struct intel_display *display, const struct drm_display_mode *mode, -- 2.25.1
