On 10/27/25 2:14 PM, Dmitry Baryshkov wrote: > On Fri, Oct 24, 2025 at 11:27:53AM +0800, yuanjiey wrote: >> On Thu, Oct 23, 2025 at 02:02:45PM +0200, Konrad Dybcio wrote: >>> On 10/23/25 1:48 PM, Dmitry Baryshkov wrote: >>>> On Thu, Oct 23, 2025 at 03:53:50PM +0800, yuanjie yang wrote: >>>>> From: Yuanjie Yang <[email protected]> >>>>> >>>>> Add DSI PHY support for the Kaanapali platform. >>>>> >>>>> Signed-off-by: Yongxing Mou <[email protected]> >>>>> Signed-off-by: Yuanjie Yang <[email protected]> >>>>> --- >>> >>> [...] >>> >>>>> + .io_start = { 0x9ac1000, 0xae97000 }, >>>> >>>> These two addresses are very strange. Would you care to explain? Other >>>> than that there is no difference from SM8750 entry. >>> >>> They're correct. >>> Although they correspond to DSI_0 and DSI_2.. >>> >>> Yuanjie, none of the DSI patches mention that v2.10.0 is packed with >>> new features. Please provide some more context and how that impacts >>> the hw description. >> >> Thanks for your reminder. >> >> Correct here: >> io_start = { 0x9ac1000, 0x9ac4000 } DSI_Phy0 DSI_phy1 >> >> And v2.10.0 no clearly meaningful changes compared to v2.9.0. >> just some register address change. > > Addition of DSI2 is a meaningful change, which needs to be handled both > in the core and in the DSI / DSI PHY drivers.
DSI2 was introduced in 8750 already, but it was done without any fanfare.. I see a diagram that shows an XBAR with inputs from DSI0 and DSI2, and an output to DSI0_PHY (same thing on kaanapali - meaning this patch is potentially wrong and should ref DSI1_PHY instead?) Konrad
