Hi Niklas, On 05/11/2025 23:27, Niklas Söderlund wrote: > Describe Imagination Technologies PowerVR Rogue GE7800 BNVC 15.5.1.64 > present in Renesas R-Car R8A779A0 V3U SoC. > > Signed-off-by: Niklas Söderlund <[email protected]> > --- > arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > index b08865841476..aa347b699340 100644 > --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi > @@ -338,6 +338,23 @@ cmt3: timer@e6148000 { > status = "disabled"; > }; > > + gsx: gsx@fd000000 {
Why gsx? Marek's equivalent patch for r8a77965-gpu[1] used gpu (as we do for every dt so far). > + compatible = "renesas,r8a779a0-gpu", > + "img,img-ge7800", > + "img,img-rogue"; > + reg = <0 0xfd000000 0 0x40000>; > + interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_CORE R8A779A0_CLK_ZG>, > + <&cpg CPG_CORE R8A779A0_CLK_S3D1>, > + <&cpg CPG_MOD 0>; I don't have access to a TRM for V3U (it's too new apparently, despite already being obsolete), but I believe the GPU integration should be similar to the M3N in [1]. In that case, the TRM (v2.40, fig 23.3) shows S2D1 and 112 in place of S3D1 and 0 – are these definitely correct? The 0 especially feels wrong (see also 8A.2.1.2 MSTPSR1). > + clock-names = "core", "mem", "sys"; > + power-domains = <&sysc R8A779A0_PD_3DG_A>, > + <&sysc R8A779A0_PD_3DG_B>; > + power-domain-names = "a", "b"; > + resets = <&cpg 0>; Same 0 concern as above. Cheers, Matt [1]: https://lore.kernel.org/r/[email protected]/ > + status = "disabled"; > + }; > + > cpg: clock-controller@e6150000 { > compatible = "renesas,r8a779a0-cpg-mssr"; > reg = <0 0xe6150000 0 0x4000>; -- Matt Coster E: [email protected]
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