Currently the driver only configure the data edge sampling partially.
AM62X, AM62A and AM62P require it to be configured in two distinct
registers: one in tidss and one in the Control MMR registers.
Introduce a new dt property to link the proper syscon node from the main
device registers into the tidss driver.
The series targets to fix the issue for AM62X and AM62A, later will add
the changes required for AM62P after DSS support gets upstreamed.
Fixes: ad2ac9dc9426 ("drm/tidss: Add support for AM625 DSS")
Fixes: 5cc5ea7b6d7b ("drm/tidss: Add support for AM62A7 DSS")
---
Cc: [email protected]
Signed-off-by: Louis Chauvet <[email protected]>
Signed-off-by: Swamil Jain <[email protected]>
---
Changelog v1->v2:
- Add all devices requiring the fix in cover letter
- Update Fixes tag
- Use "Cc: [email protected]" properly
Link to v1:
https://lore.kernel.org/all/[email protected]/
---
Louis Chauvet (4):
dt-bindings: display: ti,am65x-dss: Add clk property for data edge
synchronization
dt-bindings: mfd: syscon: Add ti,am625-dss-clk-ctrl
arm64: dts: ti: k3-am62-main: Add tidss clk-ctrl property
drm/tidss: Fix sampling edge configuration
Swamil Jain (1):
arm64: dts: ti: k3-am62a-main: Add tidss clk-ctrl property
.../bindings/display/ti/ti,am65x-dss.yaml | 6 ++++++
Documentation/devicetree/bindings/mfd/syscon.yaml | 3 ++-
arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 6 ++++++
arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 7 +++++++
drivers/gpu/drm/tidss/tidss_dispc.c | 14 ++++++++++++++
5 files changed, 35 insertions(+), 1 deletion(-)
