Move start functionality into a separate helper so we can use it from the sequencer.
Reviewed-by: Lyude Paul <[email protected]> Signed-off-by: Joel Fernandes <[email protected]> --- drivers/gpu/nova-core/falcon.rs | 26 ++++++++++++++++---------- 1 file changed, 16 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon.rs index dc883ce5f28b..1bcee06fdec2 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -553,7 +553,21 @@ pub(crate) fn wait_till_halted(&self, bar: &Bar0) -> Result<()> { Ok(()) } - /// Runs the loaded firmware and waits for its completion. + /// Start the falcon CPU. + pub(crate) fn start(&self, bar: &Bar0) -> Result<()> { + match regs::NV_PFALCON_FALCON_CPUCTL::read(bar, &E::ID).alias_en() { + true => regs::NV_PFALCON_FALCON_CPUCTL_ALIAS::default() + .set_startcpu(true) + .write(bar, &E::ID), + false => regs::NV_PFALCON_FALCON_CPUCTL::default() + .set_startcpu(true) + .write(bar, &E::ID), + } + + Ok(()) + } + + /// Start running the loaded firmware. /// /// `mbox0` and `mbox1` are optional parameters to write into the `MBOX0` and `MBOX1` registers /// prior to running. @@ -578,15 +592,7 @@ pub(crate) fn boot( .write(bar, &E::ID); } - match regs::NV_PFALCON_FALCON_CPUCTL::read(bar, &E::ID).alias_en() { - true => regs::NV_PFALCON_FALCON_CPUCTL_ALIAS::default() - .set_startcpu(true) - .write(bar, &E::ID), - false => regs::NV_PFALCON_FALCON_CPUCTL::default() - .set_startcpu(true) - .write(bar, &E::ID), - } - + self.start(bar)?; self.wait_till_halted(bar)?; let (mbox0, mbox1) = ( -- 2.34.1
