On Sun, Nov 02, 2025 at 05:09:07PM +0100, Marek Vasut wrote: > The instance of the GPU populated in i.MX95 is the G310, describe this > GPU in the DT. Include dummy GPU voltage regulator and OPP tables.
The commit log seems need an update for the regulator part? Shawn > > Reviewed-by: Frank Li <[email protected]> > Signed-off-by: Marek Vasut <[email protected]> > --- > Cc: Boris Brezillon <[email protected]> > Cc: Conor Dooley <[email protected]> > Cc: David Airlie <[email protected]> > Cc: Fabio Estevam <[email protected]> > Cc: Jiyu Yang (OSS) <[email protected]> > Cc: Krzysztof Kozlowski <[email protected]> > Cc: Liviu Dudau <[email protected]> > Cc: Maarten Lankhorst <[email protected]> > Cc: Maxime Ripard <[email protected]> > Cc: Pengutronix Kernel Team <[email protected]> > Cc: Philipp Zabel <[email protected]> > Cc: Rob Herring <[email protected]> > Cc: Sascha Hauer <[email protected]> > Cc: Sebastian Reichel <[email protected]> > Cc: Shawn Guo <[email protected]> > Cc: Simona Vetter <[email protected]> > Cc: Steven Price <[email protected]> > Cc: Thomas Zimmermann <[email protected]> > Cc: Xianzhong Li <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > --- > V2: - Drop regulator-{always,boot}-on from fixed-gpu-reg regulator > - Keep the GPU and GPUMIX always enabled > - Switch from fsl, to nxp, vendor prefix > - Fix opp_table to opp-table > - Describe IMX95_CLK_GPUAPB as coregroup clock > - Sort interrupts by their names to match bindings > V3: - Drop perf power domain > - Drop reset block controller > V4: - Add RB from Frank > - Drop the now optional GPU regulator > --- > arch/arm64/boot/dts/freescale/imx95.dtsi | 37 ++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx95.dtsi > b/arch/arm64/boot/dts/freescale/imx95.dtsi > index a91e1724ab1a4..e45014d50abef 100644 > --- a/arch/arm64/boot/dts/freescale/imx95.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx95.dtsi > @@ -250,6 +250,28 @@ dummy: clock-dummy { > clock-output-names = "dummy"; > }; > > + gpu_opp_table: opp-table { > + compatible = "operating-points-v2"; > + > + opp-500000000 { > + opp-hz = /bits/ 64 <500000000>; > + opp-hz-real = /bits/ 64 <500000000>; > + opp-microvolt = <920000>; > + }; > + > + opp-800000000 { > + opp-hz = /bits/ 64 <800000000>; > + opp-hz-real = /bits/ 64 <800000000>; > + opp-microvolt = <920000>; > + }; > + > + opp-1000000000 { > + opp-hz = /bits/ 64 <1000000000>; > + opp-hz-real = /bits/ 64 <1000000000>; > + opp-microvolt = <920000>; > + }; > + }; > + > clk_ext1: clock-ext1 { > compatible = "fixed-clock"; > #clock-cells = <0>; > @@ -2139,6 +2161,21 @@ netc_emdio: mdio@0,0 { > }; > }; > > + gpu: gpu@4d900000 { > + compatible = "nxp,imx95-mali", "arm,mali-valhall-csf"; > + reg = <0 0x4d900000 0 0x480000>; > + clocks = <&scmi_clk IMX95_CLK_GPU>, <&scmi_clk > IMX95_CLK_GPUAPB>; > + clock-names = "core", "coregroup"; > + interrupts = <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "job", "mmu", "gpu"; > + operating-points-v2 = <&gpu_opp_table>; > + power-domains = <&scmi_devpd IMX95_PD_GPU>; > + #cooling-cells = <2>; > + dynamic-power-coefficient = <1013>; > + }; > + > ddr-pmu@4e090dc0 { > compatible = "fsl,imx95-ddr-pmu", "fsl,imx93-ddr-pmu"; > reg = <0x0 0x4e090dc0 0x0 0x200>; > -- > 2.51.0 >
