On 11/18/25 9:50 AM, Akhil P Oommen wrote:
> REG_A6XX_GMU_AO_AHB_FENCE_CTRL register falls under GMU's register
> range. So, use gmu_write() routines to write to this register.
>
> Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state")
> Cc: [email protected]
> Signed-off-by: Akhil P Oommen <[email protected]>
> ---Reviewed-by: Konrad Dybcio <[email protected]> Konrad
