On the MediaTek MT8196 SoC, the Mali GPU's "shader_present" hardware register may also include a non-functional shader core, along with the present shader cores. An efuse elsewhere in the SoC provides the shader_present mask with the fused off core omitted.
However, the efuse address is not publicly disclosed. What is known though is that the GPUEB MCU reads this efuse, and exposes its contents in the memory it shares with the application processor. We can therefore describe the mediatek,mt8196-gpufreq device as being an nvmem provider for this purpose, as it does provide nvmem access in an indirect way. The shader-present child node is left out of the list of required properties as we may one day be able to describe the actual efuse region this value comes from, so the gpufreq device isn't necessarily the only device that can provide this cell, and implementations shouldn't need to implement this functionality once this is the case. Reviewed-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Nicolas Frattaroli <[email protected]> --- .../devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml b/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml index b9e43abaf8a4..66fc59b3c8b4 100644 --- a/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml @@ -74,9 +74,18 @@ properties: "#clock-cells": const: 1 + "#nvmem-cell-cells": + const: 0 + "#power-domain-cells": const: 0 + shader-present: + type: object + +dependencies: + shader-present: [ "#nvmem-cell-cells" ] + required: - compatible - reg @@ -113,5 +122,9 @@ examples: "ccf", "fast-dvfs"; memory-region = <&gpueb_shared_memory>; #clock-cells = <1>; + #nvmem-cell-cells = <0>; #power-domain-cells = <0>; + + shader-present { + }; }; -- 2.52.0
