On 2025-11-21 14:16:55, Dmitry Baryshkov wrote: > On Fri, Nov 21, 2025 at 02:02:08PM +0800, Teguh Sobirin wrote: > > Since DPU 5.x the vsync source TE setup is split between MDP TOP and > > INTF blocks. Currently all code to setup vsync_source is only exectued > > if MDP TOP implements the setup_vsync_source() callback. However on > > DPU >= 8.x this callback is not implemented, making DPU driver skip all > > vsync setup. Move the INTF part out of this condition, letting DPU > > driver to setup TE vsync selection on all new DPU devices. > > > > Signed-off-by: Teguh Sobirin <[email protected]> > > --- > > Changes in v2: > > - Corrected commit message suggested by Dmitry Baryshkov. > > - Link to v1: > > https://lore.kernel.org/linux-arm-msm/tyupr06mb6099cbbe5090db12a2c187e3dd...@tyupr06mb6099.apcprd06.prod.outlook.com/ > > --- > > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 22 +++++++++------------ > > 1 file changed, 9 insertions(+), 13 deletions(-) > > Fixes: e955a3f0d86e ("drm/msm/dpu: Implement tearcheck support on INTF block")
Back at that commit, setup_vsync_source was still always assigned: https://github.com/torvalds/linux/blob/e955a3f0d86e4a789364af62495ac37546eb71c8/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_top.c#L260-L263 While that was technically a wrong assumption by me - I should've put this loop outside the hw_mdptop check in case that ever happened, it got unassigned in commit 2f69e5458447 ("drm/msm/dpu: skip watchdog timer programming through TOP on >= SM8450"). Note that this patch is a severe regression on DPU <5 and doesn't set up the WD timer on DPU [5, 8), but I'll comment in-line on the diff. - Marijn
