The code was originally written using no_64bit_msi, which restricts the device to 32-bit MSI addresses.
Since msi_addr_mask is introduced, use DMA_BIT_MASK(dma_bits) instead of DMA_BIT_MASK(32) here for msi_addr_mask, describing the restriction more precisely and allowing these devices to work on platforms with MSI doorbell address above 32-bit space, as long as it is within the hardware's addressable space. Signed-off-by: Vivian Wang <[email protected]> --- hda/intel maintainers: I don't know if this is the correct restriction. Please help with checking. Thanks. --- sound/hda/controllers/intel.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/sound/hda/controllers/intel.c b/sound/hda/controllers/intel.c index c9542ebdf7e2..a44de2306a2b 100644 --- a/sound/hda/controllers/intel.c +++ b/sound/hda/controllers/intel.c @@ -1903,11 +1903,6 @@ static int azx_first_init(struct azx *chip) chip->gts_present = true; #endif - if (chip->msi && chip->driver_caps & AZX_DCAPS_NO_MSI64) { - dev_dbg(card->dev, "Disabling 64bit MSI\n"); - pci->msi_addr_mask = DMA_BIT_MASK(32); - } - pci_set_master(pci); gcap = azx_readw(chip, GCAP); @@ -1958,6 +1953,11 @@ static int azx_first_init(struct azx *chip) dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(32)); dma_set_max_seg_size(&pci->dev, UINT_MAX); + if (chip->msi && chip->driver_caps & AZX_DCAPS_NO_MSI64) { + dev_dbg(card->dev, "Restricting MSI to %u-bit\n", dma_bits); + pci->msi_addr_mask = DMA_BIT_MASK(dma_bits); + } + /* read number of streams from GCAP register instead of using * hardcoded value */ -- 2.51.2
