On 2025-12-24 17:33:49, Dmitry Baryshkov wrote:
> From: Teguh Sobirin <[email protected]>
>
> Since DPU 5.x the vsync source TE setup is split between MDP TOP and
> INTF blocks. Currently all code to setup vsync_source is only exectued
exectued -> executed typo remains since v2.
> if MDP TOP implements the setup_vsync_source() callback. However on
Double space to match the above, on two occasions: ^^
> DPU >= 8.x this callback is not implemented, making DPU driver skip all
> vsync setup. Move the INTF part out of this condition, letting DPU
^^ double space too
> driver to setup TE vsync selection on all new DPU devices.
>
> Signed-off-by: Teguh Sobirin <[email protected]>
> Fixes: 2f69e5458447 ("drm/msm/dpu: skip watchdog timer programming through
> TOP on >= SM8450")
> [DB: restored top->ops.setup_vsync_source call]
> Signed-off-by: Dmitry Baryshkov <[email protected]>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 17 +++++++++--------
> 1 file changed, 9 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> index d1cfe81a3373..0482b2bb5a9e 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
> @@ -774,6 +774,9 @@ static void _dpu_encoder_update_vsync_source(struct
> dpu_encoder_virt *dpu_enc,
> return;
> }
>
> + /* Set vsync source irrespective of mdp top support */
I still think this comment is redundant, as mentioned in v2.
Regardless:
Reviewed-by: Marijn Suijten <[email protected]>
> + vsync_cfg.vsync_source = disp_info->vsync_source;
> +
> if (hw_mdptop->ops.setup_vsync_source) {
> for (i = 0; i < dpu_enc->num_phys_encs; i++)
> vsync_cfg.ppnumber[i] = dpu_enc->hw_pp[i]->idx;
> @@ -781,17 +784,15 @@ static void _dpu_encoder_update_vsync_source(struct
> dpu_encoder_virt *dpu_enc,
> vsync_cfg.pp_count = dpu_enc->num_phys_encs;
> vsync_cfg.frame_rate =
> drm_mode_vrefresh(&dpu_enc->base.crtc->state->adjusted_mode);
>
> - vsync_cfg.vsync_source = disp_info->vsync_source;
> -
> hw_mdptop->ops.setup_vsync_source(hw_mdptop, &vsync_cfg);
> + }
>
> - for (i = 0; i < dpu_enc->num_phys_encs; i++) {
> - phys_enc = dpu_enc->phys_encs[i];
> + for (i = 0; i < dpu_enc->num_phys_encs; i++) {
> + phys_enc = dpu_enc->phys_encs[i];
>
> - if (phys_enc->has_intf_te &&
> phys_enc->hw_intf->ops.vsync_sel)
> -
> phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf,
> - vsync_cfg.vsync_source);
> - }
> + if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.vsync_sel)
> + phys_enc->hw_intf->ops.vsync_sel(phys_enc->hw_intf,
> +
> vsync_cfg.vsync_source);
> }
> }
>
>
> --
> 2.47.3
>
