Hi Marijn, thanks for your patch!
On Mon, Dec 22, 2025 at 12:32 AM Marijn Suijten <[email protected]> wrote: > This Samsung SOFEF01-M Display-Driver-IC is used to drive 1080x2520@60Hz > command-mode DSI panels found in many Sony phones: > - Sony Xperia 5 (kumano bahamut): amb609tc01 > - Sony Xperia 10 II (seine pdx201): ams597ut01 > - Sony Xperia 10 III (lena pdx213): ams597ut04 > - Sony Xperia 10 IV (murray pdx225): ams597ut05 > - Sony Xperia 10 V (zambezi pdx235): ams605dk01 > - Sony Xperia 10 VI (columbia pdx246): ams605dk01 > > The amb609tc01 and ams605dk01 come in slightly larger at 6.1" while the > others are 6.0". > > A "fake" porch calculation is included to artificially bump the clock > rate necessary to account for "transfer overhead" (DSI packet headers) > since this is missing from the MSM DSI host driver; porches aren't > otherwise used on command-mode panels. > > Signed-off-by: Marijn Suijten <[email protected]> Excellent work with abstracting all the sofef01-m panels! Only nitpicks follow: > + if (ctx->panel_type == PANEL_TYPE_TC01 || > + ctx->panel_type == PANEL_TYPE_UT01 || > + ctx->panel_type == PANEL_TYPE_UT04) { > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); The sofef00 driver tell us exactly what this sequence is: #define sofef00_test_key_on_lvl2(ctx) \ mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0x5a, 0x5a) #define sofef00_test_key_off_lvl2(ctx) \ mipi_dsi_dcs_write_seq_multi(ctx, 0xf0, 0xa5, 0xa5) I would just rename these two to sofef01_test_key_on/off_lvl2() and use the same helpers in this driver to follow the sofef00 pattern. > + if (ctx->panel_type == PANEL_TYPE_UT04) { > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); Like here > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfc, 0x5a, 0x5a); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE1, 0x00, 0x00, > 0x02, 0x00, 0x1C, 0x1C, > + 0x00, 0x00, 0x20, 0x00, 0x00, > 0x01, 0x19); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfc, 0xa5, 0xa5); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); And here. > + if (ctx->panel_type == PANEL_TYPE_UT05 || ctx->panel_type == > PANEL_TYPE_DK01) { > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); And here. > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x27, 0xf2); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf2, 0x80); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf7, 0x07); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); And here. > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); And here. > + /* Downstream: ERR_FG Enable */ > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xe5, 0x15); > + if (ctx->panel_type == PANEL_TYPE_DK01) > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x0f, > 0x4c, 0x20); > + else > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xed, 0x04, > 0x4c, 0x20); > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); And here. > + > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0x5a, 0x5a); And here. > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x02, 0x8f); > + > + if (ctx->panel_type == PANEL_TYPE_DK01) > + /* Downstream Xperia 10 V: FLM1,FLM2 On */ > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8f, 0x27, > 0x25); > + else if (0) /* TODO: Both use the DK01 panel */ > + /* Downstream Xperia 10 VI: FLM1 On, FLM2 On */ > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8f, 0x27, > 0x27); > + else > + /* Downsteam: FLM1 on, FLM2 off */ > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8f, 0x27, > 0x05); > + > + mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xf0, 0xa5, 0xa5); And here. (etc). +/- these changes: Reviewed-by: Linus Walleij <[email protected]> Yours, Linus Walleij
