On Sat, Dec 27, 2025 at 3:05 AM Krzysztof Kozlowski <[email protected]> wrote: > > DTS files for qcom,adreno-610.0 and qcom,adreno-07000200 contain only one > "reg" entry, not two, and the binding defines the second entry in > "reg-names" differently than top-level part, so just simplify it and > narrow to only one entry.
I'll defer to Akhil about whether this is actually needed (vs just incomplete gpu devcoredump support for certain GPUs). In general cx_dbgc is needed to capture state for gpu devcoredump state snapshots, but not directly used in normal operations. It seems similar to the situation with mapping gpucc as part of gmu, ie. not something the CPU normally deals with directly, but necessary to capture crash state. BR, -R > Signed-off-by: Krzysztof Kozlowski <[email protected]> > --- > Documentation/devicetree/bindings/display/msm/gpu.yaml | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml > b/Documentation/devicetree/bindings/display/msm/gpu.yaml > index 826aafdcc20b..1ae5faf2c867 100644 > --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml > +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml > @@ -378,11 +378,12 @@ allOf: > - const: xo > description: GPUCC clocksource clock > > + reg: > + maxItems: 1 > + > reg-names: > - minItems: 1 > items: > - const: kgsl_3d0_reg_memory > - - const: cx_dbgc > > required: > - clocks > -- > 2.51.0 >
