On 5/15/2025 7:52 AM, Jessica Zhang wrote:
Validate requested mode and topology based on the PINGPONG or DSC encoder
max width. In addition, drop MAX_HDISPLAY_SPLIT and base LM reservation
off of PINGPONG or DSC encoder max width
As noted in the patch, while DPU 8.x+ supports a max linewidth of 8960
for PINGPONG_0, there is some additional logic that needs to be added to
the resource manager to specifically try and reserve PINGPONG_0 for
modes that are greater than 5k.
Since this is out of the scope of this series, add a helper that will
get the overall minimum PINGPONG max linewidth for a given chipset.
Signed-off-by: Jessica Zhang <[email protected]>
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drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 46 +++++++++++++++++++++++++++-----
1 file changed, 39 insertions(+), 7 deletions(-)
Thanks for the patches! With patch 2&3 applied on top of v6.18, I'm able
to get DSI panel and DP monitor working simultaneously on qcs6490.
Tested-by: Xilin Wu <[email protected]> # qcs6490-radxa-dragon-q6a
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Best regards,
Xilin Wu <[email protected]>
