On Wed, 31 Dec 2025 15:56:10 +0100 Marek Vasut <[email protected]> wrote:
> Currently, in rcar_mipi_dsi_parameters_calc(), the VCLK divider is stored > in setup_info structure as BIT(divider). The rcar_mipi_dsi_parameters_calc() > is called at the early beginning of rcar_mipi_dsi_startup() function. Later, > in the same rcar_mipi_dsi_startup() function, the stored BIT(divider) value > is passed to __ffs() to calculate back the divider out of the value again. > > Factor out VCLK divider calculation into rcar_mipi_dsi_vclk_divider() > function and call the function from both rcar_mipi_dsi_parameters_calc() > and rcar_mipi_dsi_startup() to avoid this back and forth BIT() and _ffs() > and avoid unnecessarily storing the divider value in setup_info at all. > > This rework has a slight side-effect, in that it should allow the compiler > to better evaluate the code and avoid compiler warnings about variable > value overflows, which can never happen. > > Reported-by: kernel test robot <[email protected]> > Closes: > https://lore.kernel.org/oe-kbuild-all/[email protected]/ > Closes: > https://lore.kernel.org/oe-kbuild-all/[email protected]/ > Signed-off-by: Marek Vasut <[email protected]> > --- > Cc: David Airlie <[email protected]> > Cc: Geert Uytterhoeven <[email protected]> > Cc: Kieran Bingham <[email protected]> > Cc: Laurent Pinchart <[email protected]> > Cc: Maarten Lankhorst <[email protected]> > Cc: Magnus Damm <[email protected]> > Cc: Maxime Ripard <[email protected]> > Cc: Simona Vetter <[email protected]> > Cc: Thomas Zimmermann <[email protected]> > Cc: Tomi Valkeinen <[email protected]> > Cc: [email protected] > Cc: [email protected] > Cc: [email protected] > --- > .../gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c | 35 ++++++++++++++----- > 1 file changed, 26 insertions(+), 9 deletions(-) > > diff --git a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > index 4ef2e3c129ed7..875945bf8255b 100644 > --- a/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > +++ b/drivers/gpu/drm/renesas/rcar-du/rcar_mipi_dsi.c > @@ -84,7 +84,6 @@ struct dsi_setup_info { > unsigned long fout; > u16 m; > u16 n; > - u16 vclk_divider; > const struct dsi_clk_config *clkset; > }; > > @@ -335,10 +334,24 @@ rcar_mipi_dsi_post_init_phtw_v4h(struct rcar_mipi_dsi > *dsi, > * Hardware Setup > */ > > +static unsigned int rcar_mipi_dsi_vclk_divider(struct rcar_mipi_dsi *dsi, > + struct dsi_setup_info > *setup_info) > +{ > + switch (dsi->info->model) { > + case RCAR_DSI_V3U: > + default: > + return (setup_info->clkset->vco_cntrl >> 4) & 0x3; > + > + case RCAR_DSI_V4H: > + return (setup_info->clkset->vco_cntrl >> 3) & 0x7; > + } > +} > + > static void rcar_mipi_dsi_pll_calc(struct rcar_mipi_dsi *dsi, > unsigned long fin_rate, > unsigned long fout_target, > - struct dsi_setup_info *setup_info) > + struct dsi_setup_info *setup_info, > + u16 vclk_divider) There is no need for this to be u16, unsigned int will generate better code. > { > unsigned int best_err = -1; > const struct rcar_mipi_dsi_device_info *info = dsi->info; > @@ -360,7 +373,7 @@ static void rcar_mipi_dsi_pll_calc(struct rcar_mipi_dsi > *dsi, > if (fout < info->fout_min || fout > info->fout_max) > continue; > > - fout = div64_u64(fout, setup_info->vclk_divider); > + fout = div64_u64(fout, vclk_divider); Since vclk_divider is BIT_U32(div [+ 1]) this is just a shift right. So pass the bit number instead. > > if (fout < setup_info->clkset->min_freq || > fout > setup_info->clkset->max_freq) > @@ -390,7 +403,9 @@ static void rcar_mipi_dsi_parameters_calc(struct > rcar_mipi_dsi *dsi, > unsigned long fout_target; > unsigned long fin_rate; > unsigned int i; > + unsigned int div; > unsigned int err; > + u16 vclk_divider; > > /* > * Calculate Fout = dot clock * ColorDepth / (2 * Lane Count) > @@ -412,18 +427,20 @@ static void rcar_mipi_dsi_parameters_calc(struct > rcar_mipi_dsi *dsi, > > fin_rate = clk_get_rate(clk); > > + div = rcar_mipi_dsi_vclk_divider(dsi, setup_info); > + > switch (dsi->info->model) { > case RCAR_DSI_V3U: > default: > - setup_info->vclk_divider = 1 << ((clk_cfg->vco_cntrl >> 4) & > 0x3); > + vclk_divider = BIT_U32(div); > break; > > case RCAR_DSI_V4H: > - setup_info->vclk_divider = 1 << (((clk_cfg->vco_cntrl >> 3) & > 0x7) + 1); > + vclk_divider = BIT_U32(div + 1); > break; > } > > - rcar_mipi_dsi_pll_calc(dsi, fin_rate, fout_target, setup_info); > + rcar_mipi_dsi_pll_calc(dsi, fin_rate, fout_target, setup_info, > vclk_divider); > > /* Find hsfreqrange */ > setup_info->hsfreq = setup_info->fout * 2; > @@ -439,7 +456,7 @@ static void rcar_mipi_dsi_parameters_calc(struct > rcar_mipi_dsi *dsi, > dev_dbg(dsi->dev, > "Fout = %u * %lu / (%u * %u * %u) = %lu (target %lu Hz, error > %d.%02u%%)\n", > setup_info->m, fin_rate, dsi->info->n_mul, setup_info->n, > - setup_info->vclk_divider, setup_info->fout, fout_target, > + vclk_divider, setup_info->fout, fout_target, > err / 100, err % 100); > > dev_dbg(dsi->dev, > @@ -653,11 +670,11 @@ static int rcar_mipi_dsi_startup(struct rcar_mipi_dsi > *dsi, > switch (dsi->info->model) { > case RCAR_DSI_V3U: > default: > - vclkset |= VCLKSET_DIV_V3U(__ffs(setup_info.vclk_divider)); > + vclkset |= VCLKSET_DIV_V3U(rcar_mipi_dsi_vclk_divider(dsi, > &setup_info)); What is going on here? rcar_mipi_dsi_vclk_divider() is (setup_info->clkset->vco_cntrl >> 4) & 0x3 VCLKSET_DIV_V3U(n) FIELD_PREP(VCLKSET_DIV_V3U_MASK, (n)) VCLKSET_DIV_V3U_MASK is GENMASK_U32(5, 4) Looks like a very complicated way of saying: vclkset |= setup_info->clkset->vco_cntrl & VCLKSET_DIV_V3U_MASK; It might be a semi-accident that the bit numbers match. But I also suspect it is also semi-deliberate. > break; > > case RCAR_DSI_V4H: > - vclkset |= VCLKSET_DIV_V4H(__ffs(setup_info.vclk_divider) - 1); > + vclkset |= VCLKSET_DIV_V4H(rcar_mipi_dsi_vclk_divider(dsi, > &setup_info)); That one looks like it needs the 'subtract one' done somewhere. Maybe: vclkset |= (setup_info->clkset->vco_cntrl - (1u << 3)) & VCLKSET_DIV_V4U_MASK; Although you may want to write the '8' in a different (longer) way :-) David > break; > } >
