From: Sebastian Krzyszkowiak <[email protected]>
FP8006P datasheet mentions:
It is necessary to wait 15msec after releasing RESX before sending
commands. Also Sleep Out command cannot be sent for 120 msec.
This hasn't been respected by the driver so far, which could interfere
with the LCD init code sequence performed by the controller. In some cases
this leads to VCOM voltage being set to a wrong value, causing "halo"
effects, temporary burn-in around the edges of the screen and degraded
image contrast.
T3 and T4 are counted from when VDDI is enabled. There's no need to add
them when we've already waited more than that in T2 and T2d.
While FT8006P datasheet does not mention a delay between exiting sleep
mode and turning the display on, code provided by the vendor uses 120ms
there and it happens to be the same value as required in newer datasheets
for newer controllers from the same family, so it seems appropriate to
use it here as well.
Signed-off-by: Sebastian Krzyszkowiak <[email protected]>
---
drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c | 13 +++++++------
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
index fafd80f3e952..bb5489e4d7a9 100644
--- a/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
+++ b/drivers/gpu/drm/panel/panel-mantix-mlaf057we51.c
@@ -58,11 +58,9 @@ static void mantix_init_sequence(struct
mipi_dsi_multi_context *dsi_ctx)
mipi_dsi_generic_write_seq_multi(dsi_ctx, MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x5a, 0x09);
mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x80, 0x64, 0x00, 0x64, 0x00,
0x00);
- mipi_dsi_msleep(dsi_ctx, 20);
mipi_dsi_generic_write_seq_multi(dsi_ctx, MANTIX_CMD_SPI_FINISH, 0xa5);
mipi_dsi_generic_write_seq_multi(dsi_ctx,
MANTIX_CMD_OTP_STOP_RELOAD_MIPI, 0x00, 0x2f);
- mipi_dsi_msleep(dsi_ctx, 20);
}
static int mantix_enable(struct drm_panel *panel)
@@ -75,8 +73,11 @@ static int mantix_enable(struct drm_panel *panel)
if (!dsi_ctx.accum_err)
dev_dbg(ctx->dev, "Panel init sequence done\n");
+ /* remainder to 120ms (7.3.1 Note 4) */
+ mipi_dsi_msleep(&dsi_ctx, 70);
+
mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
- mipi_dsi_msleep(&dsi_ctx, 20);
+ mipi_dsi_msleep(&dsi_ctx, 120);
mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
mipi_dsi_usleep_range(&dsi_ctx, 10000, 12000);
@@ -147,10 +148,10 @@ static int mantix_prepare(struct drm_panel *panel)
return ret;
}
- /* T3 + T4 + time for voltage to become stable: */
- usleep_range(6000, 7000);
- gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ usleep_range(100, 200);
gpiod_set_value_cansleep(ctx->tp_rstn_gpio, 0);
+ usleep_range(100, 200);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
/* T6 */
msleep(50);
