On Tue, Jan 13, 2026 at 04:26:50PM +0100, Konrad Dybcio wrote: > On 1/13/26 1:24 AM, Dmitry Baryshkov wrote: > > On Mon, Jan 12, 2026 at 12:08:13PM +0100, Konrad Dybcio wrote: > >> On 1/10/26 8:37 PM, Dmitry Baryshkov wrote: > >>> MDSS and GPU drivers use different approaches to get min_acc length. > >>> Add helper function that can be used by all the drivers. > >>> > >>> Signed-off-by: Dmitry Baryshkov <[email protected]> > >>> --- > >>> include/linux/soc/qcom/ubwc.h | 7 +++++++ > >>> 1 file changed, 7 insertions(+) > >>> > >>> diff --git a/include/linux/soc/qcom/ubwc.h b/include/linux/soc/qcom/ubwc.h > >>> index f052e241736c..50d891493ac8 100644 > >>> --- a/include/linux/soc/qcom/ubwc.h > >>> +++ b/include/linux/soc/qcom/ubwc.h > >>> @@ -74,4 +74,11 @@ static inline bool qcom_ubwc_get_ubwc_mode(const > >>> struct qcom_ubwc_cfg_data *cfg) > >>> return ret; > >>> } > >>> > >>> +static inline bool qcom_ubwc_min_acc_length_64b(const struct > >>> qcom_ubwc_cfg_data *cfg) > >>> +{ > >>> + return cfg->ubwc_enc_version == UBWC_1_0 && > >>> + (cfg->ubwc_dec_version == UBWC_2_0 || > >>> + cfg->ubwc_dec_version == UBWC_3_0); > >> > >> Are you sure this is a correct heuristic? > > > > No, but it matches what we had in MDSS driver (and I think it matches > > the chipsets that were selected by the GPU driver). > > Should we keep a comment that this is a best guess that worked out so > far?
Sure. -- With best wishes Dmitry
