Re: [PATCH] arm64: dts: broadcom: bcm2712: Add V3D device node

[Stefan Wahren]

Hi Maíra,

Am 13.01.26 um 20:28 schrieb Maíra Canal:
Commits 0ad5bc1ce463 ("drm/v3d: fix up register addresses for V3D 7.x")
and 6fd9487147c4 ("drm/v3d: add brcm,2712-v3d as a compatible V3D device")
added driver support for V3D on BCM2712, but the corresponding device
tree node is still missing.
Add the V3D device tree node to the BCM2712 DTS.

Signed-off-by: Maíra Canal <mca...@igalia.com>
---
  .../boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts  |  4 ++++
  arch/arm64/boot/dts/broadcom/bcm2712.dtsi          | 14 ++++++++++++++
  2 files changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts 
b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
index 7d4742ebe247..97522c6803c5 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts
this file doesn't exist in linux-next anymore.

Do you mean bcm2712-rpi-5-b-base.dtsi ?
@@ -247,3 +247,7 @@ &pcie1 {
  &pcie2 {
        status = "okay";
  };
+
+&v3d {
+       clocks = <&firmware_clocks 5>;
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi 
b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
index 330a121ebfcb..4c9c63fcf037 100644
--- a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi
@@ -1,5 +1,6 @@
  // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  #include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/soc/bcm2835-pm.h>
  
  / {
        compatible = "brcm,bcm2712";
@@ -642,6 +643,19 @@ mip1: msi-controller@1000131000 {
                        msi-ranges = <&gicv2 GIC_SPI 247 IRQ_TYPE_EDGE_RISING 
8>;
                        brcm,msi-offset = <8>;
                };
+
+               v3d: gpu@2000000 {
Please keep the order of the addresses. In case v3d is really part of 
the axi bus, then this should be the first child node of axi (2000000 < 
1000100000).

Thanks
+                       compatible = "brcm,2712-v3d";
+                       reg = <0x10 0x02000000 0x0 0x4000>,
+                             <0x10 0x02008000 0x0 0x6000>,
+                             <0x10 0x02030800 0x0 0x0700>;
+                       reg-names = "hub", "core0", "sms";
+
+                       power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
+                       resets = <&pm BCM2835_RESET_V3D>;
+                       interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>;
+               };
        };
  
  	vc4: gpu {