On Mon, Feb 16, 2026 at 12:17:31PM +0530, Riana Tauro wrote:
> Report the SoC nonfatal/fatal hardware error and update the counters.
...
> + /*
> + * Read the master global IEH error register, if BIT(1) is set then
> process
> + * the slave IEH first. If BIT(0) in global error register is set then
> process
> + * the corresponding local error registers.
> + */
> + master_global_errstat = xe_mmio_read32(mmio,
> SOC_GLOBAL_ERR_STAT_REG(master, hw_err));
> + if (master_global_errstat & SOC_SLAVE_IEH)
> + soc_slave_ieh_handler(tile, hw_err, error_id);
> +
> + if (master_global_errstat & SOC_IEH0_LOCAL_ERR_STATUS) {
> + const char * const *reg_info = (hw_err == HARDWARE_ERROR_FATAL)
> ?
> + pvc_master_local_fatal_err_reg :
> +
> pvc_master_local_nonfatal_err_reg;
Nit: Ditto, with something like PVC_MASTER_LOCAL_REG_INFO() you won't
need a local pointer.
Reviewed-by: Raag Jadav <[email protected]>
> + master_local_errstat = xe_mmio_read32(mmio,
> SOC_LOCAL_ERR_STAT_REG(master, hw_err));
> +
> + for_each_set_bit(regbit, &master_local_errstat, XE_RAS_REG_SIZE)
> + log_soc_error(tile, reg_info, severity, regbit,
> error_id);
> +
> + xe_mmio_write32(mmio, SOC_LOCAL_ERR_STAT_REG(master, hw_err),
> master_local_errstat);
> + }
> +
> + for_each_set_bit(regbit, &master_global_errstat, XE_RAS_REG_SIZE)
> + log_soc_error(tile, pvc_master_global_err_reg, severity,
> regbit, error_id);
> +
> + xe_mmio_write32(mmio, SOC_GLOBAL_ERR_STAT_REG(master, hw_err),
> master_global_errstat);
> +
> +unmask_gsysevtctl:
> + for (i = 0; i < XE_SOC_NUM_IEH; i++)
> + xe_mmio_write32(mmio, SOC_GSYSEVTCTL_REG(master, slave, i),
> + (HARDWARE_ERROR_MAX << 1) + 1);
> +}
