Hi Matt, On Wed, 18 Feb 2026 at 12:00, Matt Coster <[email protected]> wrote: > On 31/10/2025 08:43, Geert Uytterhoeven wrote: > > On Thu, 30 Oct 2025 at 13:18, Matt Coster <[email protected]> wrote: > >> On 29/10/2025 14:08, Geert Uytterhoeven wrote: > >>> While playing with the PowerVR driver on various R-Car SoCs, I ran into > >>> a crash/race condition on Gray Hawk Single (R-Car V4M). After adding > >>> the GPU device node to DTS, the driver fails to probe due to lack of > >>> suitable firmware, as expected: > >> > >> Thanks for the detailed report! I'll make time to look into this. Do you > >> encounter a similar issue on other R-Car platforms, or is this exclusive > >> to the V4M? > > > > Yes, I managed to trigger it on Salvator-X with R-Car M3-W, too. > > Reproduction steps at: > > https://lore.kernel.org/linux-renesas-soc/camuhmdwykeqq31gek+-y4boazfccxjnac63s7noocmj1cyk...@mail.gmail.com > > > > renesas-drivers-2025-10-28 is available at > > https://web.git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git/tag/?h=renesas-drivers-2025-10-28-v6.18-rc3 > > My aarch64-linux-gnu-gcc is gcc version 13.3.0 (Ubuntu > > 13.3.0-6ubuntu2~24.04) > > I've managed to get some time with a Gray Hawk board today, but I'm > struggling to reproduce the original issue. Can you share the DTS node > you've constructed for the GPU? The patch below contains what I put > together based on the previous gen3 DTS changes and the V4M TRM.
Your DTS node looks fine to me. > That said, it's not all clear sailing. I hit this error way before the > original reported error could occur: > > renesas-cpg-mssr e6150000.clock-controller: Cannot get module clock 0: -2 > > This is emitted when attempting to dev_pm_domain_attach_by_name() for > the first domain (A33DGA), and is reproducible on the tag mentioned > above, as well as the master branch in renesas-drivers and drm-misc-next > (as of this morning). The R-Car V4M clock driver does not have the GPU clocks yet (we haven't added them yet, as we couldn't test the GPU). The whitespace-damaged patch below should add the clocks. Note that to reproduce you do need the extra pr_info() calls added in https://lore.kernel.org/linux-renesas-soc/camuhmdwykeqq31gek+-y4boazfccxjnac63s7noocmj1cyk...@mail.gmail.com And any R-Car board with IMG GPU should do, just make sure the GPU node is enabled in the board DTS (it is still disabled, due to the crash). Thanks for looking into this! --- a/drivers/clk/renesas/r8a779h0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779h0-cpg-mssr.c @@ -158,6 +158,8 @@ static const struct cpg_core_clk r8a779h0_core_clks[] __initconst = { DEF_DIV6P1("csi", R8A779H0_CLK_CSI, CLK_PLL5_DIV4, CPG_CSICKCR), DEF_FIXED("dsiref", R8A779H0_CLK_DSIREF, CLK_PLL5_DIV4, 48, 1), DEF_DIV6P1("dsiext", R8A779H0_CLK_DSIEXT, CLK_PLL5_DIV4, CPG_DSIEXTCKCR), + // FIXME programmable divider in FRQCRB + DEF_FIXED("zg", R8A779H0_CLK_ZG, CLK_PLL4_DIV2, 2, 1), DEF_DIV6P1("mso", R8A779H0_CLK_MSO, CLK_PLL5_DIV4, CPG_MSOCKCR), DEF_GEN4_SDH("sd0h", R8A779H0_CLK_SD0H, CLK_SDSRC, CPG_SD0CKCR), @@ -171,6 +173,7 @@ static const struct cpg_core_clk r8a779h0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779h0_mod_clks[] __initconst = { + DEF_MOD("3dge", 0, R8A779H0_CLK_ZG), DEF_MOD("isp0", 16, R8A779H0_CLK_S0D2_VIO), DEF_MOD("avb0:rgmii0", 211, R8A779H0_CLK_S0D8_HSC), DEF_MOD("avb1:rgmii1", 212, R8A779H0_CLK_S0D8_HSC), Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
