On Fri, Feb 27, 2026 at 11:41:29AM +0100, Marek Vasut wrote: > On 2/26/26 5:16 PM, Luca Ceresoli wrote: > > Generation of a test pattern output is a useful tool for panel bringup and > > debugging, and very simple to support with this chip. > > > > The value of REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW needs to be divided by two > > for the test pattern to work in dual LVDS mode. While not clearly stated in > > the datasheet, this is needed according to the DSI Tuner [0] output. And > > some dual-LVDS panels refuse to show any picture without this division by > > two. > > > > [0] https://www.ti.com/tool/DSI-TUNER > > > > Signed-off-by: Luca Ceresoli <[email protected]> > > --- > > drivers/gpu/drm/bridge/ti-sn65dsi83.c | 13 +++++++++++-- > > 1 file changed, 11 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi83.c > > b/drivers/gpu/drm/bridge/ti-sn65dsi83.c > > index 17a885244e1e..ddc8b5e1dd15 100644 > > --- a/drivers/gpu/drm/bridge/ti-sn65dsi83.c > > +++ b/drivers/gpu/drm/bridge/ti-sn65dsi83.c > > @@ -114,6 +114,7 @@ > > #define REG_VID_CHA_HORIZONTAL_FRONT_PORCH 0x38 > > #define REG_VID_CHA_VERTICAL_FRONT_PORCH 0x3a > > #define REG_VID_CHA_TEST_PATTERN 0x3c > > +#define REG_VID_CHA_TEST_PATTERN_EN BIT(4) > > /* IRQ registers */ > > #define REG_IRQ_GLOBAL 0xe0 > > #define REG_IRQ_GLOBAL_IRQ_EN BIT(0) > > @@ -134,6 +135,9 @@ > > #define REG_IRQ_STAT_CHA_SOT_BIT_ERR BIT(2) > > #define REG_IRQ_STAT_CHA_PLL_UNLOCK BIT(0) > > +static bool sn65dsi83_test_pattern; > > +module_param_named(test_pattern, sn65dsi83_test_pattern, bool, 0644); > > Can this be enabled/disabled at runtime via sysfs attribute instead ?
Then you would have to deal with concurrency with the atomic state updates, and it would really be better implemented as a connector property. In other words, it's probably enough for now :) Maxime
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