Signed-off-by: Abel Vesa <[email protected]>
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Changes in v2:
- Fixed the reg ranges in the example node in qcom,glymur-mdss.yaml as well.
- Link to v1:
https://patch.msgid.link/20260227-glymur-fix-dp-bindings-reg-clocks-v1-1-99f7b42b4...@oss.qualcomm.com
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Abel Vesa (2):
dt-bindings: display: msm: Fix reg ranges and clocks on Glymur
dt-bindings: display: msm: Fix reg ranges for DP example node
.../bindings/display/msm/dp-controller.yaml | 21 ++++++++++++++++++++-
.../bindings/display/msm/qcom,glymur-mdss.yaml | 16 ++++++++++------
2 files changed, 30 insertions(+), 7 deletions(-)
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base-commit: 7c21b660e919698b10efa8bdb120f0f9bc3d3832
change-id: 20260227-glymur-fix-dp-bindings-reg-clocks-704d0ccbeef9
Best regards,
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Abel Vesa <[email protected]>
