On Tue, Mar 03, 2026 at 08:59:58AM +0100, Marco Felsch wrote:
> On 26-03-03, Liu Ying wrote:
>> On Mon, Mar 02, 2026 at 05:10:40PM +0100, Marco Felsch wrote:
>>> From: Liu Ying <[email protected]>
>>>
>>> i.MX93 SoC mediamix blk-ctrl contains one DISPLAY_MUX register which
>>> configures parallel display format by using the "PARALLEL_DISP_FORMAT"
>>> field. Document the Parallel Display Format Configuration(PDFC) subnode
>>> and add the subnode to example.
>>>
>>> Reviewed-by: Rob Herring (Arm) <[email protected]>
>>> Signed-off-by: Liu Ying <[email protected]>
>>> [[email protected]: port to v7.0-rc1]
>>> [[email protected]: add bus-width]
>>> Signed-off-by: Marco Felsch <[email protected]>
>>> ---
>>> .../bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml | 78
>>> ++++++++++++++++++++++
>>> 1 file changed, 78 insertions(+)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
>>> b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
>>> index
>>> 34aea58094e55365a2f9c86092f637e533f954ff..d828c2e82965c7a4cd69a67136047d83c96b0a35
>>> 100644
>>> ---
>>> a/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
>>> +++
>>> b/Documentation/devicetree/bindings/soc/imx/fsl,imx93-media-blk-ctrl.yaml
>>> @@ -40,6 +40,58 @@ properties:
>>> minItems: 8
>>> maxItems: 10
>>>
>>> + dpi-bridge:
>>
>> Cc'ing Frank.
>>
>> fsl,ldb.yaml documents fsl,imx6sx-ldb, fsl,imx8mp-ldb and fsl,imx93-ldb
>> with a reg property. Since all of them are child devices of either GPR
>> or BLK_CTRL and this dpi-bridge is a child device of BLK_CTRL without a
>> reg property, how can we handle the inconsistency? At least, with this
>> patch and the current fsl,ldb.yaml, we cannot add an i.MX93 LDB child
>> node.
>
> This reg property was longly discussed and there should be no reg
> because this 'reg' covers not only the PDFC register fields. Please see
> the discussion:
>
> -
> https://lore.kernel.org/all/paxpr04mb84599d676ec1e3879694579688...@paxpr04mb8459.eurprd04.prod.outlook.com/
>
> The LDB node shouldn't have a reg property in the first place. There are
> a few registers within BLK-CTRL which belong to only one "IP" like the
> LDB. But these are the exception rather than the rule. To make it
> possible to abstract _all_ sub-devices within the BLK control you need
> to drop the reg property. The subdevice drivers need to handle the
> offsets within the BLK-CTRL accordingly, like the LDB driver already
> does. So removing the reg property from the LDB dt-bindings is the
> correct fix.
Hmm, reg property was added intentionally by the below commit. But,
I'm not saying removing the reg property is not a correct fix. Just
feel embarrassing to see that it was added and then to be removed.
16c8d76abe83 dt-bindings: display: bridge: ldb: Fill in reg property
Can you contribute patches to get this done if you think it's a correct
fix?
>
> Regards,
> Marco
>
>>> + type: object
>>> + additionalProperties: false
>>> +
>>> + properties:
>>> + compatible:
>>> + enum:
>>> + - nxp,imx91-pdfc
>>> + - nxp,imx93-pdfc
>>> +
>>> + ports:
>>> + $ref: /schemas/graph.yaml#/properties/ports
>>> +
>>> + properties:
>>> + port@0:
>>> + $ref: /schemas/graph.yaml#/properties/port
>>> + description: Input port node to receive pixel data.
>>> +
>>> + port@1:
>>> + $ref: /schemas/graph.yaml#/$defs/port-base
>>> + unevaluatedProperties: false
>>> + description: Output port node to downstream pixel data
>>> receivers.
>>> +
>>> + properties:
>>> + endpoint:
>>> + $ref: /schemas/media/video-interfaces.yaml#
>>> + unevaluatedProperties: false
>>> +
>>> + properties:
>>> + bus-width:
>>> + enum: [ 16, 18, 24 ]
>>> + description:
>>> + Specify the physical parallel bus width.
>>> +
>>> + This property is optional if the display bus-width
>>> + matches the SoC bus-width, e.g. a 18-bit RGB666
>>> (display)
>>> + is connected and all 18-bit data lines are muxed to
>>> the
>>> + parallel-output pads.
>>> +
>>> + This property must be set to 18 to cut only the LSBs
>>> + instead of the MSBs in case a 24-bit RGB888 display
>>> is
>>> + connected and only the lower 18-bit data lanes are
>>> muxed
>>> + to the parallel-output pads.
>>> +
>>> + required:
>>> + - port@0
>>> + - port@1
>>> +
>>> + required:
>>> + - compatible
>>> + - ports
>>> +
>>> allOf:
>>> - if:
>>> properties:
>>> @@ -112,4 +164,30 @@ examples:
>>> clock-names = "apb", "axi", "nic", "disp", "cam",
>>> "pxp", "lcdif", "isi", "csi", "dsi";
>>> #power-domain-cells = <1>;
>>> +
>>> + dpi-bridge {
>>> + compatible = "nxp,imx93-pdfc";
>>> +
>>> + ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@0 {
>>> + reg = <0>;
>>> +
>>> + pdfc_from_lcdif: endpoint {
>>> + remote-endpoint = <&lcdif_to_pdfc>;
>>> + };
>>> + };
>>> +
>>> + port@1 {
>>> + reg = <1>;
>>> +
>>> + pdfc_to_panel: endpoint {
>>> + remote-endpoint = <&panel_from_pdfc>;
>>> + bus-width = <18>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> };
>>>
>>
>> --
>> Regards,
>> Liu Ying
>>
>
--
Regards,
Liu Ying
