Extend the driver to handle UBWC 3.1 (in the same way as we handle UBWC 3.0).
Reviewed-by: Konrad Dybcio <[email protected]> Signed-off-by: Dmitry Baryshkov <[email protected]> --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 6089a58074ac..cb06db3cb367 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -324,7 +324,8 @@ void dpu_hw_setup_format_impl(struct dpu_sw_pipe *pipe, const struct msm_format } else if (ctx->ubwc->ubwc_enc_version == UBWC_2_0) { fast_clear = fmt->alpha_enable ? BIT(31) : 0; ctrl_val = fast_clear | qcom_ubwc_swizzle(ctx->ubwc) | (hbb << 4); - } else if (ctx->ubwc->ubwc_enc_version == UBWC_3_0) { + } else if (ctx->ubwc->ubwc_enc_version == UBWC_3_0 || + ctx->ubwc->ubwc_enc_version == UBWC_3_1) { ctrl_val = BIT(30) | qcom_ubwc_swizzle(ctx->ubwc) | (hbb << 4); } else if (ctx->ubwc->ubwc_enc_version == UBWC_4_0) { ctrl_val = MSM_FORMAT_IS_YUV(fmt) ? 0 : BIT(30); -- 2.47.3
