On 05/03/2026 11:06, Brajesh Gupta wrote: > Only a META firmware can have two threads.
If this is invalid behaviour on non-META firwmare processors, should this be considered a fix (and gain a Fixes: tag)? I guess technically it doesn't fix the commit that added these lines[1] since that was only adding support for META. Would it be fixing the follow up to add MIPS support[2]? I'm not sure. Maybe it doesn't even need a Fixes: tag. > > Signed-off-by: Brajesh Gupta <[email protected]> Either way, the content is: Reviewed-by: Matt Coster <[email protected]> [1]: commit cc1aeedb98ad3 ("drm/imagination: Implement firmware infrastructure and META FW support") [2]: commit 927f3e0253c11 ("drm/imagination: Implement MIPS firmware processor and MMU support") > --- > drivers/gpu/drm/imagination/pvr_fw_startstop.c | 14 ++++++++------ > 1 file changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/imagination/pvr_fw_startstop.c > b/drivers/gpu/drm/imagination/pvr_fw_startstop.c > index ce089f51f06a..3bca57cbaaf0 100644 > --- a/drivers/gpu/drm/imagination/pvr_fw_startstop.c > +++ b/drivers/gpu/drm/imagination/pvr_fw_startstop.c > @@ -242,12 +242,14 @@ pvr_fw_stop(struct pvr_device *pvr_dev) > ROGUE_CR_MTS_BGCTX_THREAD0_DM_ASSOC_MASKFULL & > ROGUE_CR_MTS_BGCTX_THREAD0_DM_ASSOC_DM_ASSOC_CLRMSK); > > - pvr_cr_write32(pvr_dev, ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC, > - ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC_MASKFULL & > - ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC_DM_ASSOC_CLRMSK); > - pvr_cr_write32(pvr_dev, ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC, > - ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC_MASKFULL & > - ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC_DM_ASSOC_CLRMSK); > + if (pvr_dev->fw_dev.processor_type == PVR_FW_PROCESSOR_TYPE_META) { > + pvr_cr_write32(pvr_dev, ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC, > + ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC_MASKFULL & > + > ROGUE_CR_MTS_INTCTX_THREAD1_DM_ASSOC_DM_ASSOC_CLRMSK); > + pvr_cr_write32(pvr_dev, ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC, > + ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC_MASKFULL & > + > ROGUE_CR_MTS_BGCTX_THREAD1_DM_ASSOC_DM_ASSOC_CLRMSK); > + } > > /* Extra Idle checks. */ > err = pvr_cr_poll_reg32(pvr_dev, ROGUE_CR_BIF_STATUS_MMU, 0, > > -- > 2.43.0 > -- Matt Coster E: [email protected]
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