Hi Krzysztof,
On 3/11/2026 9:01 PM, Krzysztof Kozlowski wrote:
On Tue, Mar 10, 2026 at 06:53:04PM +0800, Damon Ding wrote:
The eDP TX controller on RK3576 is the same as that on RK3588.
The newly added clock 'hclk' is the video datapath clock.
Signed-off-by: Damon Ding <[email protected]>
---
.../bindings/display/rockchip/rockchip,analogix-dp.yaml | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
index d99b23b88cc5..4496a43881f9 100644
---
a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
+++
b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
@@ -15,6 +15,7 @@ properties:
enum:
- rockchip,rk3288-dp
- rockchip,rk3399-edp
+ - rockchip,rk3576-edp
- rockchip,rk3588-edp
clocks:
@@ -26,7 +27,9 @@ properties:
items:
- const: dp
- const: pclk
- - const: grf
+ - enum:
+ - grf
+ - hclk
And why it is not the same clock? Nothing in commit msg explains why
this clock input (not output!) is different.
After checking the CRU design for both platforms, I confirm that both
require this HCLK.
The RK3588 platform works without explicitly adding this clock because
the 'rockchip,vo-grf = <&vo1_grf>' property implicitly enables hclk_vo1.
For v2, it should be better to add the corresponding HCLK reference to
the eDP nodes in the RK3588 DTS.
Best regards,
Damon
