On Tue, Mar 17, 2026 at 4:18 AM Adriano Vero
<[email protected]> wrote:
>
> Signed-off-by: Adriano Vero <[email protected]>
> ---
> .../dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
> a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
>
> b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> index ca5ac3c0d..3e63320fd 100644
> ---
> a/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> +++
> b/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/dml2_core_dcn4_calcs.c
> @@ -12670,7 +12670,7 @@ static void rq_dlg_get_dlg_reg(
> disp_dlg_regs->refcyc_per_vm_req_flip = (unsigned
> int)(math_pow(2, 23) - 1);
>
>
> - DML_ASSERT(disp_dlg_regs->dst_y_after_scaler < (unsigned
> int)8);
> + DML_ASSERT(disp_dlg_regs->dst_y_after_scaler < (int
> unsigned)8);
Isn't this just doing what you are claiming to fix?
> DML_ASSERT(disp_dlg_regs->refcyc_x_after_scaler < (unsigned
> int)math_pow(2, 13));
>
> if (disp_dlg_regs->dst_y_per_pte_row_nom_l >= (unsigned
> int)math_pow(2, 17)) {
> @@ -13226,7 +13226,7 @@ void dml2_core_calcs_get_informative(const struct
> dml2_core_internal_display_mod
>
> out->informative.misc.cstate_max_cap_mode =
> dml_get_cstate_max_cap_mode(mode_lib);
>
> - out->min_clocks.dcn4x.dpprefclk_khz = (int
> unsigned)dml_get_global_dppclk_khz(mode_lib);
> + out->min_clocks.dcn4x.dpprefclk_khz = (unsigned
> int)dml_get_global_dppclk_khz(mode_lib);
>
> out->informative.qos.max_active_fclk_change_latency_supported =
> dml_get_fclk_change_latency(mode_lib);
>
> --
> 2.47.3
>
