Replace all open-coded access to MCR registers in Gen1 with the appropriate calls to ast_moutdwm() and ast_mindwm(). Use MCR register constants.
For the poll loop on MCR100, add ast_moutdwm_poll(). The helper polls the register until it has been updated to the given value. Relax the CPU while busy-waiting. Signed-off-by: Thomas Zimmermann <[email protected]> --- drivers/gpu/drm/ast/ast_2000.c | 18 +++++++----------- drivers/gpu/drm/ast/ast_drv.c | 12 ++++++++++++ drivers/gpu/drm/ast/ast_drv.h | 1 + drivers/gpu/drm/ast/ast_reg.h | 2 ++ 4 files changed, 22 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/ast/ast_2000.c b/drivers/gpu/drm/ast/ast_2000.c index e683edf595e2..4cf951b3533d 100644 --- a/drivers/gpu/drm/ast/ast_2000.c +++ b/drivers/gpu/drm/ast/ast_2000.c @@ -99,20 +99,15 @@ static const struct ast_dramstruct ast2000_dram_table_data[] = { static void ast_post_chip_2000(struct ast_device *ast) { u8 j; - u32 temp, i; - const struct ast_dramstruct *dram_reg_info; + u32 i; j = ast_get_index_reg_mask(ast, AST_IO_VGACRI, 0xd0, 0xff); if ((j & 0x80) == 0) { /* VGA only */ - dram_reg_info = ast2000_dram_table_data; - ast_write32(ast, 0xf004, AST_REG_MCR00); - ast_write32(ast, 0xf000, 0x1); - ast_write32(ast, 0x10100, 0xa8); + const struct ast_dramstruct *dram_reg_info = ast2000_dram_table_data; + u32 mcr140; - do { - ; - } while (ast_read32(ast, 0x10100) != 0xa8); + ast_moutdwm_poll(ast, AST_REG_MCR100, 0xa8, 0xa8); while (!AST_DRAMSTRUCT_IS(dram_reg_info, INVALID)) { if (AST_DRAMSTRUCT_IS(dram_reg_info, UDELAY)) { @@ -124,8 +119,9 @@ static void ast_post_chip_2000(struct ast_device *ast) dram_reg_info++; } - temp = ast_read32(ast, 0x10140); - ast_write32(ast, 0x10140, temp | 0x40); + mcr140 = ast_mindwm(ast, AST_REG_MCR140); + mcr140 |= 0x00000040; + ast_moutdwm(ast, AST_REG_MCR140, mcr140); } /* wait ready */ diff --git a/drivers/gpu/drm/ast/ast_drv.c b/drivers/gpu/drm/ast/ast_drv.c index 3da0cce0a3f6..6fe549f16309 100644 --- a/drivers/gpu/drm/ast/ast_drv.c +++ b/drivers/gpu/drm/ast/ast_drv.c @@ -102,6 +102,18 @@ void ast_moutdwm(struct ast_device *ast, u32 r, u32 v) __ast_moutdwm(ast->regs, r, v); } +void ast_moutdwm_poll(struct ast_device *ast, u32 r, u32 v, u32 res) +{ + void __iomem *regs = ast->regs; + + __ast_selseg(regs, r); + __ast_wrseg32(regs, r, v); + + do { + cpu_relax(); + } while (__ast_rdseg32(regs, r) != res); +} + /* * AST device */ diff --git a/drivers/gpu/drm/ast/ast_drv.h b/drivers/gpu/drm/ast/ast_drv.h index 3eedf8239333..4f221b848d68 100644 --- a/drivers/gpu/drm/ast/ast_drv.h +++ b/drivers/gpu/drm/ast/ast_drv.h @@ -361,6 +361,7 @@ u32 __ast_mindwm(void __iomem *regs, u32 r); void __ast_moutdwm(void __iomem *regs, u32 r, u32 v); u32 ast_mindwm(struct ast_device *ast, u32 r); void ast_moutdwm(struct ast_device *ast, u32 r, u32 v); +void ast_moutdwm_poll(struct ast_device *ast, u32 r, u32 v, u32 res); /* * VBIOS diff --git a/drivers/gpu/drm/ast/ast_reg.h b/drivers/gpu/drm/ast/ast_reg.h index a01af2bfbae6..9ebdbbde9a47 100644 --- a/drivers/gpu/drm/ast/ast_reg.h +++ b/drivers/gpu/drm/ast/ast_reg.h @@ -140,8 +140,10 @@ #define AST_REG_MCR80 AST_REG_MCR(0x80) #define AST_REG_MCR84 AST_REG_MCR(0x84) #define AST_REG_MCR88 AST_REG_MCR(0x88) +#define AST_REG_MCR100 AST_REG_MCR(0x100) #define AST_REG_MCR108 AST_REG_MCR(0x108) #define AST_REG_MCR120 AST_REG_MCR(0x120) +#define AST_REG_MCR140 AST_REG_MCR(0x140) #define AST_REG_MCR200 AST_REG_MCR(0x200) #define AST_REG_MCR204 AST_REG_MCR(0x204) #define AST_REG_MCR208 AST_REG_MCR(0x208) -- 2.53.0
