Hi Damon,

Am Donnerstag, 7. Mai 2026, 13:29:39 Mitteleuropäische Sommerzeit schrieb Damon 
Ding:
> The RK3588 eDP controller needs the video datapath clock "hclk" to work
> well. Previously, it works without explicitly adding this clock because
> the 'rockchip,vo-grf = <&vo1_grf>' property implicitly enables HCLK_VO1.
>
> Fixes: f855146263b1 ("dt-bindings: display: rockchip: analogix-dp: Add 
> support for RK3588")
> Signed-off-by: Damon Ding <[email protected]>
> ---
>  .../bindings/display/rockchip/rockchip,analogix-dp.yaml       | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git 
> a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
>  
> b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
> index d99b23b88cc5..d2bc8636b626 100644
> --- 
> a/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
> +++ 
> b/Documentation/devicetree/bindings/display/rockchip/rockchip,analogix-dp.yaml
> @@ -26,7 +26,9 @@ properties:
>      items:
>        - const: dp
>        - const: pclk
> -      - const: grf
> +      - enum:
> +          - grf
> +          - hclk

are you sure about that?

The edp uses the vo1-grf - so what enables its clock?
For example the hdmi controllers on rk3588 also use the vo1-grf and
explicitly handle that clock.

So who does it for the eDP?


Heiko

>  
>    power-domains:
>      maxItems: 1
> 




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