In cdn_dp_enable_phy(), when an error occurs after the GRF register has been set to DPTX_HPD_SEL, the cleanup path at err_phy calls cdn_dp_grf_write() to restore DPTX_HPD_DEL, but the return value is ignored.
If this restore write fails (e.g., due to a bus timeout or GRF power loss), the GRF register remains in the DPTX_HPD_SEL state. This leaves the DP PHY control in an inconsistent state, which can cause subsequent DP link initialization to fail or produce undefined behavior. Fix by checking the return value of cdn_dp_grf_write() in the error path and logging an error if it fails. Signed-off-by: Jiaqi <[email protected]> --- drivers/gpu/drm/rockchip/cdn-dp-core.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/cdn-dp-core.c b/drivers/gpu/drm/rockchip/cdn-dp-core.c index 8afabe2118a9..1234567890ab 100644 --- a/drivers/gpu/drm/rockchip/cdn-dp-core.c +++ b/drivers/gpu/drm/rockchip/cdn-dp-core.c @@ -425,8 +425,9 @@ err_power_on: port->phy_enabled = false; err_phy: - cdn_dp_grf_write(dp, GRF_SOC_CON26, - DPTX_HPD_SEL_MASK | DPTX_HPD_DEL); + ret = cdn_dp_grf_write(dp, GRF_SOC_CON26, + DPTX_HPD_SEL_MASK | DPTX_HPD_DEL); + if (ret) + DRM_DEV_ERROR(dp->dev, "Failed to restore HPD_DEL: %d\n", ret); return ret; } -- 2.40.0
