Add full device tree definition for the integrated eDP controller on RK3576, following the existing RK3588 hardware layout.
Configure required register range, clocks, interrupt, phy, power domain, reset and grf properties to fully describe the controller. Signed-off-by: Damon Ding <[email protected]> Reviewed-by: Nicolas Frattaroli <[email protected]> --- Changes in v2: - Add Reviewed-by tag. Changes in v4: - Modify the commit msg. --- arch/arm64/boot/dts/rockchip/rk3576.dtsi | 28 ++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi index 28175d8200d5..733449cb88b1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi @@ -1496,6 +1496,34 @@ hdmi_out: port@1 { }; }; + edp: edp@27dc0000 { + compatible = "rockchip,rk3576-edp"; + reg = <0x0 0x27dc0000 0x0 0x1000>; + clocks = <&cru CLK_EDP0_24M>, <&cru PCLK_EDP0>, <&cru HCLK_VO0_ROOT>; + clock-names = "dp", "pclk", "hclk"; + interrupts = <GIC_SPI 365 IRQ_TYPE_LEVEL_HIGH>; + phys = <&hdptxphy>; + phy-names = "dp"; + power-domains = <&power RK3576_PD_VO0>; + resets = <&cru SRST_EDP0_24M>, <&cru SRST_P_EDP0>; + reset-names = "dp", "apb"; + rockchip,grf = <&vo0_grf>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + edp_in: port@0 { + reg = <0>; + }; + + edp_out: port@1 { + reg = <1>; + }; + }; + }; + dp: dp@27e40000 { compatible = "rockchip,rk3576-dp"; reg = <0x0 0x27e40000 0x0 0x30000>; -- 2.34.1
